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pwm: stm32: Use hweight32 in stm32_pwm_detect_channels

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[ Upstream commit 41fa8f57c0d269243fe3bde2bce71e82c884b9ad ]

Use hweight32() to count the CCxE bits in stm32_pwm_detect_channels().
Since the return value is assigned to chip.npwm, change it to unsigned
int as well.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Stable-dep-of: 19f1016ea960 ("pwm: stm32: Fix enable count for clk in .probe()")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Philipp Zabel 2023-10-19 22:07:02 +02:00 • committed by Greg Kroah-Hartman
parent ade959ed67
commit 0d554b420c
1 changed files with 2 additions and 15 deletions
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17
drivers/pwm/pwm-stm32.c
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@ -575,10 +575,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
priv->have_complementary_output = (ccer != 0);
}
static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
static unsigned int stm32_pwm_detect_channels(struct stm32_pwm *priv)
{
u32 ccer;
int npwm = 0;
/*
* If channels enable bits don't exist writing 1 will have no
@ -588,19 +587,7 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
regmap_read(priv->regmap, TIM_CCER, &ccer);
regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
if (ccer & TIM_CCER_CC1E)
npwm++;
if (ccer & TIM_CCER_CC2E)
npwm++;
if (ccer & TIM_CCER_CC3E)
npwm++;
if (ccer & TIM_CCER_CC4E)
npwm++;
return npwm;
return hweight32(ccer & TIM_CCER_CCXE);
}
static int stm32_pwm_probe(struct platform_device *pdev)