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arm64: dts: qcom: sm8150: add ref clock to PCIe PHYs

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[ Upstream commit c204b3709409279ac019f3d374e444bb0b1424f0 ]

Follow the rest of the platforms and add "ref" clocks to both PCIe PHYs
found on the Qualcomm SM8150 platform.

Fixes: a1c86c6805 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230820142035.89903-15-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2023-08-20 17:20:31 +03:00 • committed by Greg Kroah-Hartman
parent cd952d43c0
commit 1a404795c4
1 changed files with 10 additions and 2 deletions
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12
arch/arm64/boot/dts/qcom/sm8150.dtsi
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@ -1839,8 +1839,12 @@
ranges;
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
<&gcc GCC_PCIE_0_CLKREF_CLK>,
<&gcc GCC_PCIE0_PHY_REFGEN_CLK>;
clock-names = "aux", "cfg_ahb", "refgen";
clock-names = "aux",
"cfg_ahb",
"ref",
"refgen";
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
reset-names = "phy";
@ -1938,8 +1942,12 @@
ranges;
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
<&gcc GCC_PCIE_1_CLKREF_CLK>,
<&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
clock-names = "aux", "cfg_ahb", "refgen";
clock-names = "aux",
"cfg_ahb",
"ref",
"refgen";
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
reset-names = "phy";