From 6005791f5855d2bb4c433d76a65f22b28f218642 Mon Sep 17 00:00:00 2001
From: Amir Vajid <quic_avajid@quicinc.com>
Date: Mon, 16 Jan 2023 12:32:02 -0800
Subject: [PATCH] drivers: dcvs: add support for DCVS_UBWCP hw type

Create a new DCVS HW type for UBWCP to allow for
voting on a new path to DDR that goes through the
UBWCP hardware. This new voting interface is only
supported on the slow path through icc.

Change-Id: Iaf87e2bf033dafefe08d11681f09629547c7b588
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
---
 drivers/soc/qcom/dcvs/dcvs.c     | 6 ++++--
 drivers/soc/qcom/dcvs/dcvs_icc.c | 7 ++++---
 include/soc/qcom/dcvs.h          | 2 ++
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/soc/qcom/dcvs/dcvs.c b/drivers/soc/qcom/dcvs/dcvs.c
index 6ef370f954d6..28ce7b0de981 100644
--- a/drivers/soc/qcom/dcvs/dcvs.c
+++ b/drivers/soc/qcom/dcvs/dcvs.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #define pr_fmt(fmt) "qcom-dcvs: " fmt
@@ -30,6 +30,7 @@ static const char * const dcvs_hw_names[NUM_DCVS_HW_TYPES] = {
 	[DCVS_LLCC]		= "LLCC",
 	[DCVS_L3]		= "L3",
 	[DCVS_DDRQOS]		= "DDRQOS",
+	[DCVS_UBWCP]		= "UBWCP",
 };
 
 enum dcvs_type {
@@ -769,7 +770,8 @@ static int qcom_dcvs_path_probe(struct platform_device *pdev)
 	switch (path_type) {
 	case DCVS_SLOW_PATH:
 		if (hw->type == DCVS_DDR || hw->type == DCVS_LLCC
-					|| hw->type == DCVS_DDRQOS)
+					|| hw->type == DCVS_DDRQOS
+					|| hw->type == DCVS_UBWCP)
 			ret = setup_icc_sp_device(dev, hw, path);
 		else if (hw->type == DCVS_L3)
 			ret = setup_epss_l3_sp_device(dev, hw, path);
diff --git a/drivers/soc/qcom/dcvs/dcvs_icc.c b/drivers/soc/qcom/dcvs/dcvs_icc.c
index df97dd182cb2..550f24ea650a 100644
--- a/drivers/soc/qcom/dcvs/dcvs_icc.c
+++ b/drivers/soc/qcom/dcvs/dcvs_icc.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #define pr_fmt(fmt) "qcom-dcvs-icc: " fmt
@@ -53,7 +53,7 @@ int setup_icc_sp_device(struct device *dev, struct dcvs_hw *hw,
 	int ret = 0;
 
 	if (hw->type != DCVS_DDR && hw->type != DCVS_LLCC
-					&& hw->type != DCVS_DDRQOS)
+			&& hw->type != DCVS_DDRQOS && hw->type != DCVS_UBWCP)
 		return -EINVAL;
 
 	sp_data = devm_kzalloc(dev, sizeof(*sp_data), GFP_KERNEL);
@@ -66,7 +66,8 @@ int setup_icc_sp_device(struct device *dev, struct dcvs_hw *hw,
 			dev_err(dev, "Unable to register icc path: %d\n", ret);
 		return ret;
 	}
-	if (hw->type == DCVS_DDR || hw->type == DCVS_LLCC)
+	if (hw->type == DCVS_DDR || hw->type == DCVS_LLCC
+				|| hw->type == DCVS_UBWCP)
 		icc_set_tag(sp_data->icc_path, ACTIVE_ONLY_TAG);
 	else if (hw->type == DCVS_DDRQOS)
 		icc_set_tag(sp_data->icc_path, ACTIVE_ONLY_TAG | PERF_MODE_TAG);
diff --git a/include/soc/qcom/dcvs.h b/include/soc/qcom/dcvs.h
index 963a1f408af1..48b64cd6dd9f 100644
--- a/include/soc/qcom/dcvs.h
+++ b/include/soc/qcom/dcvs.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef _QCOM_DCVS_H
@@ -17,6 +18,7 @@ enum dcvs_hw_type {
 	DCVS_LLCC,
 	DCVS_L3,
 	DCVS_DDRQOS,
+	DCVS_UBWCP,
 	NUM_DCVS_HW_TYPES
 };