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mtd: rawnand: marvell: don't set the NAND frequency select

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[ Upstream commit c4d28e30a8d0b979e4029465ab8f312ab6ce2644 ]

marvell_nfc_setup_interface() uses the frequency retrieved from the
clock associated with the nand interface to determine the timings that
will be used. By changing the NAND frequency select without reflecting
this in the clock configuration this means that the timings calculated
don't correctly meet the requirements of the NAND chip. This hasn't been
an issue up to now because of a different bug that was stopping the
timings being updated after they were initially set.

Fixes: b25251414f ("mtd: rawnand: marvell: Stop implementing ->select_chip()")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230525003154.2303012-2-chris.packham@alliedtelesis.co.nz
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Chris Packham 2023-05-25 12:31:53 +12:00 • committed by Greg Kroah-Hartman
parent 2187cb72b9
commit 62dcac528b
1 changed files with 0 additions and 4 deletions
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4
drivers/mtd/nand/raw/marvell_nand.c
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@ -2891,10 +2891,6 @@ static int marvell_nfc_init(struct marvell_nfc *nfc)
regmap_update_bits(sysctrl_base, GENCONF_CLK_GATING_CTRL, regmap_update_bits(sysctrl_base, GENCONF_CLK_GATING_CTRL,
GENCONF_CLK_GATING_CTRL_ND_GATE, GENCONF_CLK_GATING_CTRL_ND_GATE,
GENCONF_CLK_GATING_CTRL_ND_GATE); GENCONF_CLK_GATING_CTRL_ND_GATE);
regmap_update_bits(sysctrl_base, GENCONF_ND_CLK_CTRL,
GENCONF_ND_CLK_CTRL_EN,
GENCONF_ND_CLK_CTRL_EN);
} }
/* Configure the DMA if appropriate */ /* Configure the DMA if appropriate */