diff --git a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4-pineapple.h b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4-pineapple.h
index d52c868d9b5d..4be7b11dcd3f 100644
--- a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4-pineapple.h
+++ b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4-pineapple.h
@@ -28,6 +28,10 @@
 #define UFS_PHY_POWER_DOWN_CONTROL		PHY_OFF(0x4)
 #define UFS_PHY_TX_LARGE_AMP_DRV_LVL		PHY_OFF(0x30)
 #define UFS_PHY_RX_SIGDET_CTRL2			PHY_OFF(0x18C)
+#define UFS_PHY_TX_POST_EMP_LVL_S4		PHY_OFF(0x240)
+#define UFS_PHY_TX_POST_EMP_LVL_S5		PHY_OFF(0x244)
+#define UFS_PHY_TX_POST_EMP_LVL_S6		PHY_OFF(0x248)
+#define UFS_PHY_TX_POST_EMP_LVL_S7		PHY_OFF(0x24C)
 
 #define QSERDES_COM_CMN_IPTRIM		COM_OFF(0x100)
 #define QSERDES_COM_SYSCLK_EN_SEL		COM_OFF(0x110)
@@ -220,11 +224,11 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A_g5[] = {
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE3_B5, 0x36),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE3_B8, 0x02),
 
-	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B0, 0x24),
-	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B1, 0x24),
+	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B0, 0x1B),
+	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B1, 0x1B),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B2, 0x20),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B3, 0xB9),
-	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B4, 0x4F),
+	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_RATE4_B4, 0x5D),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_UCDR_SO_SATURATION, 0x1F),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_UCDR_PI_CTRL1, 0x94),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_TERM_BW_CTRL0, 0xFA),
@@ -262,11 +266,11 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A_g5[] = {
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE3_B5, 0x36),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE3_B8, 0x02),
 
-	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B0, 0x24),
-	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B1, 0x24),
+	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B0, 0x1B),
+	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B1, 0x1B),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B2, 0x20),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B3, 0xB9),
-	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B4, 0x4F),
+	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_RATE4_B4, 0x5D),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_UCDR_SO_SATURATION, 0x1F),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_UCDR_PI_CTRL1, 0x94),
 	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_TERM_BW_CTRL0, 0xFA),
@@ -281,9 +285,12 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A_g5[] = {
 	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_HSGEAR_CAPABILITY, 0x05),
 	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_LARGE_AMP_DRV_LVL, 0x0F),
 	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_SIGDET_CTRL2, 0x68),
-
 	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_HS_G5_SYNC_LENGTH_CAPABILITY, 0x4D),
 	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_HSG5_SYNC_WAIT_TIME, 0x9E),
+	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_POST_EMP_LVL_S4, 0x0E),
+	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_POST_EMP_LVL_S5, 0x12),
+	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_POST_EMP_LVL_S6, 0x15),
+	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_POST_EMP_LVL_S7, 0x19),
 };
 
 static struct ufs_qcom_phy_calibration phy_cal_table_rate_A_g4[] = {