FROMGIT: usb: dwc2: Disable clock gating feature on Rockchip SoCs
The DWC2 IP on the Rockchip SoCs doesn't support clock gating. When a clock gating is enabled, system hangs. Bug: 300024866 Change-Id: Ie9ea9da6bb49f0c19ed097bf01ff52845219098f Signed-off-by: William Wu <william.wu@rock-chips.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Link: https://lore.kernel.org/r/1703575199-23638-1-git-send-email-william.wu@rock-chips.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit ca2dc35e555e7043de585f4e46123d8fbd2b5a21 https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git usb-next)
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@ -117,6 +117,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
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p->lpm_clock_gating = false;
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p->besl = false;
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p->hird_threshold_en = false;
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p->no_clock_gating = true;
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}
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static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
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