hwmon: (sch5627) Disallow write access if virtual registers are locked
[ Upstream commit 7da8a635436029957c5350da3acf51d78ed64071 ]
When the lock bit inside SCH5627_REG_CTRL is set, then the virtual
registers become read-only until the next power cycle.
Disallow write access to those registers in such a case.
Tested on a Fujitsu Esprimo P720.
Fixes: aa9f833dfc ("hwmon: (sch5627) Add pwmX_auto_channels_temp support")
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Link: https://lore.kernel.org/r/20230907052639.16491-3-W_Armin@gmx.de
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 9 additions and 0 deletions
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@ -34,6 +34,7 @@
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#define SCH5627_REG_CTRL 0x40
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#define SCH5627_REG_CTRL 0x40
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#define SCH5627_CTRL_START BIT(0)
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#define SCH5627_CTRL_START BIT(0)
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#define SCH5627_CTRL_LOCK BIT(1)
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#define SCH5627_CTRL_VBAT BIT(4)
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#define SCH5627_CTRL_VBAT BIT(4)
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#define SCH5627_NO_TEMPS 8
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#define SCH5627_NO_TEMPS 8
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@ -231,6 +232,14 @@ static int reg_to_rpm(u16 reg)
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static umode_t sch5627_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
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static umode_t sch5627_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
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int channel)
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int channel)
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{
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{
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const struct sch5627_data *data = drvdata;
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/* Once the lock bit is set, the virtual registers become read-only
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* until the next power cycle.
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*/
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if (data->control & SCH5627_CTRL_LOCK)
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return 0444;
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if (type == hwmon_pwm && attr == hwmon_pwm_auto_channels_temp)
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if (type == hwmon_pwm && attr == hwmon_pwm_auto_channels_temp)
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return 0644;
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return 0644;
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