diff --git a/drivers/dma/qcom/msm_gpi.c b/drivers/dma/qcom/msm_gpi.c index 4b46f055de8a..839260466936 100644 --- a/drivers/dma/qcom/msm_gpi.c +++ b/drivers/dma/qcom/msm_gpi.c @@ -126,7 +126,7 @@ enum EV_PRIORITY { #define GPII_VERB(gpii, ch, fmt, ...) #endif -#define IPC_LOG_PAGES (2) +#define IPC_LOG_PAGES (4) #define GPI_LABEL_SIZE (256) #define GPI_DBG_COMMON (99) #define MAX_CHANNELS_PER_GPII (2) @@ -299,20 +299,6 @@ static const char *const gpi_cmd_str[GPI_MAX_CMD] = { #define TO_GPI_CMD_STR(cmd) ((cmd >= GPI_MAX_CMD) ? "INVALID" : \ gpi_cmd_str[cmd]) -static const char *const gpi_cb_event_str[MSM_GPI_QUP_MAX_EVENT] = { - [MSM_GPI_QUP_NOTIFY] = "NOTIFY", - [MSM_GPI_QUP_ERROR] = "GLOBAL ERROR", - [MSM_GPI_QUP_CH_ERROR] = "CHAN ERROR", - [MSM_GPI_QUP_FW_ERROR] = "UNHANDLED ERROR", - [MSM_GPI_QUP_PENDING_EVENT] = "PENDING EVENT", - [MSM_GPI_QUP_EOT_DESC_MISMATCH] = "EOT/DESC MISMATCH", - [MSM_GPI_QUP_SW_ERROR] = "SW ERROR", - [MSM_GPI_QUP_CR_HEADER] = "Doorbell CR EVENT" -}; - -#define TO_GPI_CB_EVENT_STR(event) ((event >= MSM_GPI_QUP_MAX_EVENT) ? \ - "INVALID" : gpi_cb_event_str[event]) - enum se_protocol { SE_PROTOCOL_SPI = 1, SE_PROTOCOL_UART = 2, @@ -530,10 +516,39 @@ static const struct reg_info gpi_debug_ch_cntxt[] = { static const struct reg_info gpi_debug_regs[] = { { "DEBUG_PC", GPI_DEBUG_PC_FOR_DEBUG }, + { "DEBUG_BUSY", GPI_DEBUG_BUSY_REG }, + { "SW_RF_0", GPI_DEBUG_SW_RF_n_READ(0) }, + { "SW_RF_1", GPI_DEBUG_SW_RF_n_READ(1) }, + { "SW_RF_2", GPI_DEBUG_SW_RF_n_READ(2) }, + { "SW_RF_3", GPI_DEBUG_SW_RF_n_READ(3) }, + { "SW_RF_4", GPI_DEBUG_SW_RF_n_READ(4) }, + { "SW_RF_5", GPI_DEBUG_SW_RF_n_READ(5) }, + { "SW_RF_6", GPI_DEBUG_SW_RF_n_READ(6) }, + { "SW_RF_7", GPI_DEBUG_SW_RF_n_READ(7) }, + { "SW_RF_8", GPI_DEBUG_SW_RF_n_READ(8) }, + { "SW_RF_9", GPI_DEBUG_SW_RF_n_READ(9) }, { "SW_RF_10", GPI_DEBUG_SW_RF_n_READ(10) }, { "SW_RF_11", GPI_DEBUG_SW_RF_n_READ(11) }, { "SW_RF_12", GPI_DEBUG_SW_RF_n_READ(12) }, + { "SW_RF_13", GPI_DEBUG_SW_RF_n_READ(13) }, + { "SW_RF_14", GPI_DEBUG_SW_RF_n_READ(14) }, + { "SW_RF_15", GPI_DEBUG_SW_RF_n_READ(15) }, + { "SW_RF_16", GPI_DEBUG_SW_RF_n_READ(16) }, + { "SW_RF_17", GPI_DEBUG_SW_RF_n_READ(17) }, + { "SW_RF_18", GPI_DEBUG_SW_RF_n_READ(18) }, + { "SW_RF_19", GPI_DEBUG_SW_RF_n_READ(19) }, + { "SW_RF_20", GPI_DEBUG_SW_RF_n_READ(20) }, { "SW_RF_21", GPI_DEBUG_SW_RF_n_READ(21) }, + { "SW_RF_22", GPI_DEBUG_SW_RF_n_READ(22) }, + { "SW_RF_23", GPI_DEBUG_SW_RF_n_READ(23) }, + { "SW_RF_24", GPI_DEBUG_SW_RF_n_READ(24) }, + { "SW_RF_25", GPI_DEBUG_SW_RF_n_READ(25) }, + { "SW_RF_26", GPI_DEBUG_SW_RF_n_READ(26) }, + { "SW_RF_27", GPI_DEBUG_SW_RF_n_READ(27) }, + { "SW_RF_28", GPI_DEBUG_SW_RF_n_READ(28) }, + { "SW_RF_29", GPI_DEBUG_SW_RF_n_READ(29) }, + { "SW_RF_30", GPI_DEBUG_SW_RF_n_READ(30) }, + { "SW_RF_31", GPI_DEBUG_SW_RF_n_READ(31) }, { NULL }, }; @@ -813,6 +828,14 @@ static void gpi_dump_cntxt_regs(struct gpii *gpii) GPII_ERR(gpii, GPI_DBG_COMMON, "GPI_GPII_%d_CH_%d_RE_FETCH_READ_PTRg_val:0x%x\n", gpii->gpii_id, chan, reg_val); } + + for (chan = 0; chan < MAX_CHANNELS_PER_GPII; chan++) { + offset = GPI_GPII_MAP_EE_n_CH_k_VP_TABLE(gpii->gpii_id, + gpii->gpii_chan[chan].chid); + reg_val = readl_relaxed(gpii->regs + offset); + GPII_ERR(gpii, GPI_DBG_COMMON, "GPI_GPII_%d_CH_%d_VP_TABLE_val:0x%x\n", + gpii->gpii_id, chan, reg_val); + } } static void gpi_dump_debug_reg(struct gpii *gpii) @@ -840,6 +863,12 @@ static void gpi_dump_debug_reg(struct gpii *gpii) (gpii->gpii_id) }, { "GLOB_IRQ", GPI_GPII_n_CNTXT_GLOB_IRQ_STTS_OFFS (gpii->gpii_id) }, + { "GLOB_IRQ_EN", GPI_GPII_n_CNTXT_GLOB_IRQ_EN_OFFS + (gpii->gpii_id) }, + { "GPII_IRQ_STTS", GPI_GPII_n_CNTXT_GPII_IRQ_STTS_OFFS + (gpii->gpii_id) }, + { "GPII_IRQ_EN", GPI_GPII_n_CNTXT_GPII_IRQ_EN_OFFS + (gpii->gpii_id) }, { NULL }, }; @@ -1911,7 +1940,7 @@ static void gpi_process_ch_ctrl_irq(struct gpii *gpii) /* notifying clients if in error state */ if (gpii_chan->ch_state == CH_STATE_ERROR) gpi_generate_cb_event(gpii_chan, MSM_GPI_QUP_CH_ERROR, - __LINE__); + ch_irq); } } diff --git a/drivers/dma/qcom/msm_gpi_mmio.h b/drivers/dma/qcom/msm_gpi_mmio.h index 2e276181b677..6f9110567c4b 100644 --- a/drivers/dma/qcom/msm_gpi_mmio.h +++ b/drivers/dma/qcom/msm_gpi_mmio.h @@ -5,6 +5,8 @@ */ /* Register offsets from gpi-top */ +#define GPI_GPII_MAP_EE_n_CH_k_VP_TABLE(n, k) \ + (0x17800 + (0x4 * (k)) + (0x80 * (n))) #define GPI_GPII_n_CH_k_CNTXT_0_OFFS(n, k) \ (0x20000 + (0x4000 * (n)) + (0x80 * (k))) #define GPI_GPII_n_CH_k_CNTXT_2_OFFS(n, k) \ diff --git a/drivers/i2c/busses/i2c-msm-geni.c b/drivers/i2c/busses/i2c-msm-geni.c index bab73a983232..d0e1bb5e7cc7 100644 --- a/drivers/i2c/busses/i2c-msm-geni.c +++ b/drivers/i2c/busses/i2c-msm-geni.c @@ -349,6 +349,22 @@ void geni_i2c_se_dump_dbg_regs(struct geni_se *se, void __iomem *base, u32 geni_s_irq_en = 0; u32 geni_dma_tx_irq_en = 0; u32 geni_dma_rx_irq_en = 0; + u32 geni_general_cfg = 0; + u32 geni_output_ctrl = 0; + u32 geni_clk_ctrl_ro = 0; + u32 fifo_if_disable_ro = 0; + u32 geni_fw_multilock_msa_ro = 0; + u32 geni_clk_sel = 0; + u32 m_irq_en = 0; + u32 se_dma_tx_attr = 0; + u32 se_dma_tx_irq_stat = 0; + u32 se_dma_rx_attr = 0; + u32 se_dma_rx_irq_stat = 0; + u32 se_gsi_event_en = 0; + u32 se_irq_en = 0; + u32 dma_if_en_ro = 0; + u32 dma_general_cfg = 0; + u32 dma_debug_reg0 = 0; m_cmd0 = geni_read_reg(base, SE_GENI_M_CMD0); m_irq_status = geni_read_reg(base, SE_GENI_M_IRQ_STATUS); @@ -370,23 +386,53 @@ void geni_i2c_se_dump_dbg_regs(struct geni_se *se, void __iomem *base, geni_s_irq_en = geni_read_reg(base, SE_GENI_S_IRQ_EN); geni_dma_tx_irq_en = geni_read_reg(base, SE_DMA_TX_IRQ_EN); geni_dma_rx_irq_en = geni_read_reg(base, SE_DMA_RX_IRQ_EN); + geni_general_cfg = geni_read_reg(base, GENI_GENERAL_CFG); + geni_output_ctrl = geni_read_reg(base, GENI_OUTPUT_CTRL); + geni_clk_ctrl_ro = geni_read_reg(base, GENI_CLK_CTRL_RO); + fifo_if_disable_ro = geni_read_reg(base, GENI_IF_DISABLE_RO); + geni_fw_multilock_msa_ro = geni_read_reg(base, GENI_FW_MULTILOCK_MSA_RO); + geni_clk_sel = geni_read_reg(base, SE_GENI_CLK_SEL); + m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN); + se_dma_tx_attr = geni_read_reg(base, SE_DMA_TX_ATTR); + se_dma_tx_irq_stat = geni_read_reg(base, SE_DMA_TX_IRQ_STAT); + se_dma_rx_attr = geni_read_reg(base, SE_DMA_RX_ATTR); + se_dma_rx_irq_stat = geni_read_reg(base, SE_DMA_RX_IRQ_STAT); + se_gsi_event_en = geni_read_reg(base, SE_GSI_EVENT_EN); + se_irq_en = geni_read_reg(base, SE_IRQ_EN); + dma_if_en_ro = geni_read_reg(base, DMA_IF_EN_RO); + dma_general_cfg = geni_read_reg(base, DMA_GENERAL_CFG); + dma_debug_reg0 = geni_read_reg(base, SE_DMA_DEBUG_REG0); I2C_LOG_DBG(ipc, false, se->dev, - "%s: m_cmd0:0x%x, m_irq_status:0x%x, geni_status:0x%x, geni_ios:0x%x\n", - __func__, m_cmd0, m_irq_status, geni_status, geni_ios); + "%s: m_cmd0:0x%x, m_irq_status:0x%x, geni_status:0x%x, geni_ios:0x%x\n", + __func__, m_cmd0, m_irq_status, geni_status, geni_ios); I2C_LOG_DBG(ipc, false, se->dev, - "dma_rx_irq:0x%x, dma_tx_irq:0x%x, rx_fifo_sts:0x%x, tx_fifo_sts:0x%x\n", - dma_rx_irq, dma_tx_irq, rx_fifo_status, tx_fifo_status); + "dma_rx_irq:0x%x, dma_tx_irq:0x%x, rx_fifo_sts:0x%x, tx_fifo_sts:0x%x\n", + dma_rx_irq, dma_tx_irq, rx_fifo_status, tx_fifo_status); I2C_LOG_DBG(ipc, false, se->dev, - "se_dma_dbg:0x%x, m_cmd_ctrl:0x%x, dma_rxlen:0x%x, dma_rxlen_in:0x%x\n", - se_dma_dbg, m_cmd_ctrl, se_dma_rx_len, se_dma_rx_len_in); + "se_dma_dbg:0x%x, m_cmd_ctrl:0x%x, dma_rxlen:0x%x, dma_rxlen_in:0x%x\n", + se_dma_dbg, m_cmd_ctrl, se_dma_rx_len, se_dma_rx_len_in); I2C_LOG_DBG(ipc, false, se->dev, - "dma_txlen:0x%x, dma_txlen_in:0x%x s_irq_status:0x%x\n", - se_dma_tx_len, se_dma_tx_len_in, s_irq_status); + "dma_txlen:0x%x, dma_txlen_in:0x%x s_irq_status:0x%x\n", + se_dma_tx_len, se_dma_tx_len_in, s_irq_status); I2C_LOG_DBG(ipc, false, se->dev, - "dma_txirq_en:0x%x, dma_rxirq_en:0x%x geni_m_irq_en:0x%x geni_s_irq_en:0x%x\n", - geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_m_irq_en, - geni_s_irq_en); + "dma_txirq_en:0x%x, dma_rxirq_en:0x%x geni_m_irq_en:0x%x geni_s_irq_en:0x%x\n", + geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_m_irq_en, geni_s_irq_en); + I2C_LOG_DBG(ipc, false, se->dev, + "geni_dma_tx_irq_en:0x%x, geni_dma_rx_irq_en:0x%x, geni_general_cfg:0x%x\n", + geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_general_cfg); + I2C_LOG_DBG(ipc, false, se->dev, + "geni_clk_ctrl_ro:0x%x, fifo_if_disable_ro:0x%x, geni_fw_multilock_msa_ro:0x%x\n", + geni_clk_ctrl_ro, fifo_if_disable_ro, geni_fw_multilock_msa_ro); + I2C_LOG_DBG(ipc, false, se->dev, + "m_irq_en:0x%x, se_dma_tx_attr:0x%x se_dma_tx_irq_stat:0x%x, geni_output_ctrl:0x%x\n", + m_irq_en, se_dma_tx_attr, se_dma_tx_irq_stat, geni_output_ctrl); + I2C_LOG_DBG(ipc, false, se->dev, + "se_dma_rx_attr:0x%x, se_dma_rx_irq_stat:0x%x se_gsi_event_en:0x%x se_irq_en:0x%x\n", + se_dma_rx_attr, se_dma_rx_irq_stat, se_gsi_event_en, se_irq_en); + I2C_LOG_DBG(ipc, false, se->dev, + "dma_if_en_ro:0x%x, dma_general_cfg:0x%x dma_debug_reg0:0x%x\n, geni_clk_sel:0x%x", + dma_if_en_ro, dma_general_cfg, dma_debug_reg0, geni_clk_sel); } /* diff --git a/drivers/spi/q2spi-gsi.c b/drivers/spi/q2spi-gsi.c index 12e3a973acf1..b2976e496a47 100644 --- a/drivers/spi/q2spi-gsi.c +++ b/drivers/spi/q2spi-gsi.c @@ -658,12 +658,13 @@ void q2spi_gsi_ch_ev_cb(struct dma_chan *ch, struct msm_gpi_cb const *cb, void * struct q2spi_geni *q2spi = ptr; int num_crs, i = 0; - Q2SPI_DEBUG(q2spi, "%s event:%d\n", __func__, cb->cb_event); + Q2SPI_DEBUG(q2spi, "%s event:%s\n", __func__, TO_GPI_CB_EVENT_STR(cb->cb_event)); switch (cb->cb_event) { case MSM_GPI_QUP_NOTIFY: case MSM_GPI_QUP_MAX_EVENT: - Q2SPI_DEBUG(q2spi, "%s:cb_ev%d status%llu ts%llu count%llu\n", - __func__, cb->cb_event, cb->status, cb->timestamp, cb->count); + Q2SPI_DEBUG(q2spi, "%s cb_ev %s status %llu ts %llu count %llu\n", + __func__, TO_GPI_CB_EVENT_STR(cb->cb_event), cb->status, + cb->timestamp, cb->count); break; case MSM_GPI_QUP_ERROR: case MSM_GPI_QUP_CH_ERROR: diff --git a/drivers/spi/q2spi-msm-geni.c b/drivers/spi/q2spi-msm-geni.c index c8d7fdbae725..0428b113ce6f 100644 --- a/drivers/spi/q2spi-msm-geni.c +++ b/drivers/spi/q2spi-msm-geni.c @@ -2571,34 +2571,52 @@ void q2spi_geni_se_dump_regs(struct q2spi_geni *q2spi) mutex_unlock(&q2spi->geni_resource_lock); return; } - Q2SPI_ERROR(q2spi, "GENI_STATUS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_STATUS)); - Q2SPI_ERROR(q2spi, "SPI_TRANS_CFG: 0x%x\n", geni_read_reg(q2spi->base, SE_SPI_TRANS_CFG)); - Q2SPI_ERROR(q2spi, "SE_GENI_IOS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_IOS)); - Q2SPI_ERROR(q2spi, "SE_GENI_M_CMD0: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_M_CMD0)); - Q2SPI_ERROR(q2spi, "GENI_M_CMD_CTRL_REG: 0x%x\n", + Q2SPI_DEBUG(q2spi, "GENI_GENERAL_CFG: 0x%x\n", + geni_read_reg(q2spi->base, GENI_GENERAL_CFG)); + Q2SPI_DEBUG(q2spi, "GENI_OUTPUT_CTRL: 0x%x\n", + geni_read_reg(q2spi->base, GENI_OUTPUT_CTRL)); + Q2SPI_DEBUG(q2spi, "GENI_STATUS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_STATUS)); + Q2SPI_DEBUG(q2spi, "GENI_CLK_CTRL_RO: 0x%x\n", + geni_read_reg(q2spi->base, GENI_CLK_CTRL_RO)); + Q2SPI_DEBUG(q2spi, "GENI_FW_MULTILOCK_MSA_RO: 0x%x\n", + geni_read_reg(q2spi->base, GENI_FW_MULTILOCK_MSA_RO)); + Q2SPI_DEBUG(q2spi, "GENI_IF_DISABLE_RO: 0x%x\n", + geni_read_reg(q2spi->base, GENI_IF_DISABLE_RO)); + Q2SPI_DEBUG(q2spi, "SE_GENI_CLK_SEL: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_CLK_SEL)); + Q2SPI_DEBUG(q2spi, "SPI_TRANS_CFG: 0x%x\n", geni_read_reg(q2spi->base, SE_SPI_TRANS_CFG)); + Q2SPI_DEBUG(q2spi, "SE_GENI_IOS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_IOS)); + Q2SPI_DEBUG(q2spi, "SE_GENI_M_CMD0: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_M_CMD0)); + Q2SPI_DEBUG(q2spi, "GENI_M_CMD_CTRL_REG: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_M_CMD_CTRL_REG)); - Q2SPI_ERROR(q2spi, "GENI_M_IRQ_STATUS: 0x%x\n", + Q2SPI_DEBUG(q2spi, "GENI_M_IRQ_STATUS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_M_IRQ_STATUS)); - Q2SPI_ERROR(q2spi, "GENI_M_IRQ_EN: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_M_IRQ_EN)); - Q2SPI_ERROR(q2spi, "GENI_TX_FIFO_STATUS: 0x%x\n", + Q2SPI_DEBUG(q2spi, "GENI_M_IRQ_EN: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_M_IRQ_EN)); + Q2SPI_DEBUG(q2spi, "GENI_TX_FIFO_STATUS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_TX_FIFO_STATUS)); - Q2SPI_ERROR(q2spi, "GENI_RX_FIFO_STATUS: 0x%x\n", + Q2SPI_DEBUG(q2spi, "GENI_RX_FIFO_STATUS: 0x%x\n", geni_read_reg(q2spi->base, SE_GENI_RX_FIFO_STATUS)); - Q2SPI_ERROR(q2spi, "DMA_TX_PTR_L: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_PTR_L)); - Q2SPI_ERROR(q2spi, "DMA_TX_PTR_H: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_PTR_H)); - Q2SPI_ERROR(q2spi, "DMA_TX_ATTR: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_ATTR)); - Q2SPI_ERROR(q2spi, "DMA_TX_LEN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_LEN)); - Q2SPI_ERROR(q2spi, "DMA_TX_IRQ_STAT: 0x%x\n", + Q2SPI_DEBUG(q2spi, "DMA_TX_PTR_L: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_PTR_L)); + Q2SPI_DEBUG(q2spi, "DMA_TX_PTR_H: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_PTR_H)); + Q2SPI_DEBUG(q2spi, "DMA_TX_ATTR: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_ATTR)); + Q2SPI_DEBUG(q2spi, "DMA_TX_LEN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_LEN)); + Q2SPI_DEBUG(q2spi, "DMA_TX_IRQ_STAT: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_IRQ_STAT)); - Q2SPI_ERROR(q2spi, "DMA_TX_LEN_IN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_LEN_IN)); - Q2SPI_ERROR(q2spi, "DMA_RX_PTR_L: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_PTR_L)); - Q2SPI_ERROR(q2spi, "DMA_RX_PTR_H: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_PTR_H)); - Q2SPI_ERROR(q2spi, "DMA_RX_ATTR: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_ATTR)); - Q2SPI_ERROR(q2spi, "DMA_RX_LEN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_LEN)); - Q2SPI_ERROR(q2spi, "DMA_RX_IRQ_STAT: 0x%x\n", + Q2SPI_DEBUG(q2spi, "DMA_TX_IRQ_EN: 0x%x\n", + geni_read_reg(q2spi->base, SE_DMA_TX_IRQ_EN)); + Q2SPI_DEBUG(q2spi, "DMA_RX_IRQ_EN: 0x%x\n", + geni_read_reg(q2spi->base, SE_DMA_RX_IRQ_EN)); + Q2SPI_DEBUG(q2spi, "DMA_TX_LEN_IN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_TX_LEN_IN)); + Q2SPI_DEBUG(q2spi, "DMA_RX_PTR_L: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_PTR_L)); + Q2SPI_DEBUG(q2spi, "DMA_RX_PTR_H: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_PTR_H)); + Q2SPI_DEBUG(q2spi, "DMA_RX_ATTR: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_ATTR)); + Q2SPI_DEBUG(q2spi, "DMA_RX_LEN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_LEN)); + Q2SPI_DEBUG(q2spi, "DMA_RX_IRQ_STAT: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_IRQ_STAT)); - Q2SPI_ERROR(q2spi, "DMA_RX_LEN_IN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_LEN_IN)); - Q2SPI_ERROR(q2spi, "DMA_DEBUG_REG0: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_DEBUG_REG0)); + Q2SPI_DEBUG(q2spi, "DMA_RX_LEN_IN: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_RX_LEN_IN)); + Q2SPI_DEBUG(q2spi, "DMA_DEBUG_REG0: 0x%x\n", geni_read_reg(q2spi->base, SE_DMA_DEBUG_REG0)); + Q2SPI_DEBUG(q2spi, "SE_GSI_EVENT_EN: 0x%x\n", geni_read_reg(q2spi->base, SE_GSI_EVENT_EN)); + Q2SPI_DEBUG(q2spi, "SE_IRQ_EN: 0x%x\n", geni_read_reg(q2spi->base, SE_IRQ_EN)); + Q2SPI_DEBUG(q2spi, "DMA_IF_EN_RO: 0x%x\n", geni_read_reg(q2spi->base, DMA_IF_EN_RO)); mutex_unlock(&q2spi->geni_resource_lock); } diff --git a/drivers/spi/spi-msm-geni.c b/drivers/spi/spi-msm-geni.c index 65a99685f7bd..ac7b2f8b0447 100644 --- a/drivers/spi/spi-msm-geni.c +++ b/drivers/spi/spi-msm-geni.c @@ -275,6 +275,22 @@ void geni_spi_se_dump_dbg_regs(struct geni_se *se, void __iomem *base, u32 geni_s_irq_en = 0; u32 geni_dma_tx_irq_en = 0; u32 geni_dma_rx_irq_en = 0; + u32 geni_general_cfg = 0; + u32 geni_output_ctrl = 0; + u32 geni_clk_ctrl_ro = 0; + u32 fifo_if_disable_ro = 0; + u32 geni_fw_multilock_msa_ro = 0; + u32 geni_clk_sel = 0; + u32 m_irq_en = 0; + u32 se_dma_tx_attr = 0; + u32 se_dma_tx_irq_stat = 0; + u32 se_dma_rx_attr = 0; + u32 se_dma_rx_irq_stat = 0; + u32 se_gsi_event_en = 0; + u32 se_irq_en = 0; + u32 dma_if_en_ro = 0; + u32 dma_general_cfg = 0; + u32 dma_debug_reg0 = 0; m_cmd0 = geni_read_reg(base, SE_GENI_M_CMD0); m_irq_status = geni_read_reg(base, SE_GENI_M_IRQ_STATUS); @@ -296,23 +312,53 @@ void geni_spi_se_dump_dbg_regs(struct geni_se *se, void __iomem *base, geni_s_irq_en = geni_read_reg(base, SE_GENI_S_IRQ_EN); geni_dma_tx_irq_en = geni_read_reg(base, SE_DMA_TX_IRQ_EN); geni_dma_rx_irq_en = geni_read_reg(base, SE_DMA_RX_IRQ_EN); + geni_general_cfg = geni_read_reg(base, GENI_GENERAL_CFG); + geni_output_ctrl = geni_read_reg(base, GENI_OUTPUT_CTRL); + geni_clk_ctrl_ro = geni_read_reg(base, GENI_CLK_CTRL_RO); + fifo_if_disable_ro = geni_read_reg(base, GENI_IF_DISABLE_RO); + geni_fw_multilock_msa_ro = geni_read_reg(base, GENI_FW_MULTILOCK_MSA_RO); + geni_clk_sel = geni_read_reg(base, SE_GENI_CLK_SEL); + m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN); + se_dma_tx_attr = geni_read_reg(base, SE_DMA_TX_ATTR); + se_dma_tx_irq_stat = geni_read_reg(base, SE_DMA_TX_IRQ_STAT); + se_dma_rx_attr = geni_read_reg(base, SE_DMA_RX_ATTR); + se_dma_rx_irq_stat = geni_read_reg(base, SE_DMA_RX_IRQ_STAT); + se_gsi_event_en = geni_read_reg(base, SE_GSI_EVENT_EN); + se_irq_en = geni_read_reg(base, SE_IRQ_EN); + dma_if_en_ro = geni_read_reg(base, DMA_IF_EN_RO); + dma_general_cfg = geni_read_reg(base, DMA_GENERAL_CFG); + dma_debug_reg0 = geni_read_reg(base, SE_DMA_DEBUG_REG0); SPI_LOG_DBG(ipc, false, se->dev, - "%s: m_cmd0:0x%x, m_irq_status:0x%x, geni_status:0x%x, geni_ios:0x%x\n", - __func__, m_cmd0, m_irq_status, geni_status, geni_ios); + "%s: m_cmd0:0x%x, m_irq_status:0x%x, geni_status:0x%x, geni_ios:0x%x\n", + __func__, m_cmd0, m_irq_status, geni_status, geni_ios); SPI_LOG_DBG(ipc, false, se->dev, - "dma_rx_irq:0x%x, dma_tx_irq:0x%x, rx_fifo_sts:0x%x, tx_fifo_sts:0x%x\n", - dma_rx_irq, dma_tx_irq, rx_fifo_status, tx_fifo_status); + "dma_rx_irq:0x%x, dma_tx_irq:0x%x, rx_fifo_sts:0x%x, tx_fifo_sts:0x%x\n", + dma_rx_irq, dma_tx_irq, rx_fifo_status, tx_fifo_status); SPI_LOG_DBG(ipc, false, se->dev, - "se_dma_dbg:0x%x, m_cmd_ctrl:0x%x, dma_rxlen:0x%x, dma_rxlen_in:0x%x\n", - se_dma_dbg, m_cmd_ctrl, se_dma_rx_len, se_dma_rx_len_in); + "se_dma_dbg:0x%x, m_cmd_ctrl:0x%x, dma_rxlen:0x%x, dma_rxlen_in:0x%x\n", + se_dma_dbg, m_cmd_ctrl, se_dma_rx_len, se_dma_rx_len_in); SPI_LOG_DBG(ipc, false, se->dev, - "dma_txlen:0x%x, dma_txlen_in:0x%x s_irq_status:0x%x\n", - se_dma_tx_len, se_dma_tx_len_in, s_irq_status); + "dma_txlen:0x%x, dma_txlen_in:0x%x s_irq_status:0x%x\n", + se_dma_tx_len, se_dma_tx_len_in, s_irq_status); SPI_LOG_DBG(ipc, false, se->dev, - "dma_txirq_en:0x%x, dma_rxirq_en:0x%x geni_m_irq_en:0x%x geni_s_irq_en:0x%x\n", - geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_m_irq_en, - geni_s_irq_en); + "dma_txirq_en:0x%x, dma_rxirq_en:0x%x geni_m_irq_en:0x%x geni_s_irq_en:0x%x\n", + geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_m_irq_en, geni_s_irq_en); + SPI_LOG_DBG(ipc, false, se->dev, + "geni_dma_tx_irq_en:0x%x, geni_dma_rx_irq_en:0x%x, geni_general_cfg:0x%x\n", + geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_general_cfg); + SPI_LOG_DBG(ipc, false, se->dev, + "geni_clk_ctrl_ro:0x%x, fifo_if_disable_ro:0x%x, geni_fw_multilock_msa_ro:0x%x\n", + geni_clk_ctrl_ro, fifo_if_disable_ro, geni_fw_multilock_msa_ro); + SPI_LOG_DBG(ipc, false, se->dev, + "m_irq_en:0x%x, se_dma_tx_attr:0x%x se_dma_tx_irq_stat:0x%x, geni_output_ctrl:0x%x\n", + m_irq_en, se_dma_tx_attr, se_dma_tx_irq_stat, geni_output_ctrl); + SPI_LOG_DBG(ipc, false, se->dev, + "se_dma_rx_attr:0x%x, se_dma_rx_irq_stat:0x%x se_gsi_event_en:0x%x se_irq_en:0x%x\n", + se_dma_rx_attr, se_dma_rx_irq_stat, se_gsi_event_en, se_irq_en); + SPI_LOG_DBG(ipc, false, se->dev, + "dma_if_en_ro:0x%x, dma_general_cfg:0x%x dma_debug_reg0:0x%x\n, geni_clk_sel:0x%x", + dma_if_en_ro, dma_general_cfg, dma_debug_reg0, geni_clk_sel); } static void spi_slv_setup(struct spi_geni_master *mas); diff --git a/include/linux/msm_gpi.h b/include/linux/msm_gpi.h index fc38983fe3c3..e7beb18ccf4e 100644 --- a/include/linux/msm_gpi.h +++ b/include/linux/msm_gpi.h @@ -287,6 +287,20 @@ struct __packed qup_q2spi_cr_header_event { u8 ch_id : 8; }; +static const char *const gpi_cb_event_str[MSM_GPI_QUP_MAX_EVENT] = { + [MSM_GPI_QUP_NOTIFY] = "NOTIFY", + [MSM_GPI_QUP_ERROR] = "GLOBAL ERROR", + [MSM_GPI_QUP_CH_ERROR] = "CHAN ERROR", + [MSM_GPI_QUP_FW_ERROR] = "UNHANDLED ERROR", + [MSM_GPI_QUP_PENDING_EVENT] = "PENDING EVENT", + [MSM_GPI_QUP_EOT_DESC_MISMATCH] = "EOT/DESC MISMATCH", + [MSM_GPI_QUP_SW_ERROR] = "SW ERROR", + [MSM_GPI_QUP_CR_HEADER] = "Doorbell CR EVENT" +}; + +#define TO_GPI_CB_EVENT_STR(event) (((event) >= MSM_GPI_QUP_MAX_EVENT) ? \ + "INVALID" : gpi_cb_event_str[(event)]) + struct msm_gpi_cb { enum msm_gpi_cb_event cb_event; u64 status; diff --git a/include/linux/qcom-geni-se-common.h b/include/linux/qcom-geni-se-common.h index d6d87ee1ceab..33a6c0fe15a5 100644 --- a/include/linux/qcom-geni-se-common.h +++ b/include/linux/qcom-geni-se-common.h @@ -56,9 +56,18 @@ if (print) { \ #define I2C_CORE2X_VOTE 50000 #define I3C_CORE2X_VOTE 50000 #define APPS_PROC_TO_QUP_VOTE 140000 -/* SE_DMA_GENERAL_CFG */ -#define SE_DMA_DEBUG_REG0 (0xE40) +/* COMMON SE REGISTERS */ +#define GENI_GENERAL_CFG (0x10) +#define GENI_CLK_CTRL_RO (0x60) +#define GENI_FW_MULTILOCK_MSA_RO (0x74) + +/* SE_DMA_GENERAL_CFG */ +#define DMA_IF_EN_RO (0xe20) +#define SE_GSI_EVENT_EN (0xe18) +#define SE_IRQ_EN (0xe1c) +#define DMA_GENERAL_CFG (0xe30) +#define SE_DMA_DEBUG_REG0 (0xE40) #define SE_DMA_TX_PTR_L (0xC30) #define SE_DMA_TX_PTR_H (0xC34) #define SE_DMA_TX_ATTR (0xC38)