spi: SPI updates for v5.0
One new core feature here, a small collection of new drivers and a bunch
of small improvements in existing drivers.
- A new CS_WORD flag for transfers where the chip select is toggled at
every word, with both a generic implementation and the ability for
controllers to do this automatically (including a DaVinci one).
- New drivers for Mediatek MT2712, Qualcomm GENI and QSPI, Spreadtrum
SPI and ST STM32 QSPI plus new IDs for several existing ones.
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Merge tag 'spi-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"One new core feature here, a small collection of new drivers and a
bunch of small improvements in existing drivers:
- A new CS_WORD flag for transfers where the chip select is toggled
at every word, with both a generic implementation and the ability
for controllers to do this automatically (including a DaVinci one).
- New drivers for Mediatek MT2712, Qualcomm GENI and QSPI, Spreadtrum
SPI and ST STM32 QSPI plus new IDs for several existing ones"
* tag 'spi-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (86 commits)
spi: lpspi: add imx8qxp compatible string
spi: Allow building SPI_BCM63XX_HSSPI on ARM-based SoCs
spi: omap2-mcspi: Add slave mode support
spi: omap2-mcspi: Set FIFO DMA trigger level to word length
spi: omap2-mcspi: Switch to readl_poll_timeout()
spi: spi-mem: add stm32 qspi controller
dt-bindings: spi: add stm32 qspi controller
spi: sh-msiof: document R8A779{7|8}0 bindings
spi: pic32-sqi: don't pass GFP_DMA32 to dma_alloc_coherent
MAINTAINERS: Add entry for Broadcom SPI controller
spi: sh-msiof: fix deferred probing
spi: imx: use PIO mode if size is small
spi: imx: correct wml as the last sg length
spi: imx: move wml setting to later than setup_transfer
PCI: Provide pci_match_id() with CONFIG_PCI=n
spi: Make GPIO CSs honour the SPI_NO_CS flag
spi/spi-pxa2xx: add PXA2xx SSP SPI Controller
spi: pxa2xx: Add devicetree support
spi: pxa2xx: Use an enum for type
spi: spi-geni-qcom: Add SPI driver support for GENI based QUP
...
This commit is contained in:
Linus Torvalds
commit
b537149a2f
55 changed files with 3978 additions and 403 deletions
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@ -1705,6 +1705,10 @@ static inline int pci_irqd_intx_xlate(struct irq_domain *d,
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unsigned long *out_hwirq,
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unsigned int *out_type)
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{ return -EINVAL; }
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static inline const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
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struct pci_dev *dev)
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{ return NULL; }
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#endif /* CONFIG_PCI */
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/* Include architecture-dependent settings and functions */
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@ -36,9 +36,6 @@ enum {
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* @num_chipselect: number of chipselects supported by this SPI master
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* @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
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* controller withn the SoC. Possible values are 0 and 1.
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* @chip_sel: list of GPIOs which can act as chip-selects for the SPI.
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* SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
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* to populate if all chip-selects are internal.
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* @cshold_bug: set this to true if the SPI controller on your chip requires
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* a write to CSHOLD bit in between transfers (like in DM355).
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* @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
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@ -48,7 +45,6 @@ struct davinci_spi_platform_data {
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u8 version;
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u8 num_chipselect;
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u8 intr_line;
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u8 *chip_sel;
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u8 prescaler_limit;
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bool cshold_bug;
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enum dma_event_q dma_event_q;
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@ -196,6 +196,7 @@ enum pxa_ssp_type {
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PXA27x_SSP,
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PXA3xx_SSP,
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PXA168_SSP,
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MMP2_SSP,
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PXA910_SSP,
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CE4100_SSP,
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QUARK_X1000_SSP,
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@ -217,7 +218,7 @@ struct ssp_device {
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const char *label;
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int port_id;
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int type;
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enum pxa_ssp_type type;
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int use_count;
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int irq;
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@ -225,19 +225,14 @@ struct geni_se {
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#define HW_VER_MINOR_SHFT 16
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#define HW_VER_STEP_MASK GENMASK(15, 0)
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#define GENI_SE_VERSION_MAJOR(ver) ((ver & HW_VER_MAJOR_MASK) >> HW_VER_MAJOR_SHFT)
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#define GENI_SE_VERSION_MINOR(ver) ((ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT)
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#define GENI_SE_VERSION_STEP(ver) (ver & HW_VER_STEP_MASK)
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#if IS_ENABLED(CONFIG_QCOM_GENI_SE)
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u32 geni_se_get_qup_hw_version(struct geni_se *se);
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#define geni_se_get_wrapper_version(se, major, minor, step) do { \
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u32 ver; \
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\
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ver = geni_se_get_qup_hw_version(se); \
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major = (ver & HW_VER_MAJOR_MASK) >> HW_VER_MAJOR_SHFT; \
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minor = (ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT; \
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step = version & HW_VER_STEP_MASK; \
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} while (0)
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/**
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* geni_se_read_proto() - Read the protocol configured for a serial engine
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* @se: Pointer to the concerned serial engine.
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@ -1,15 +1,6 @@
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/*
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/* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* Copyright (C) 2005 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __LINUX_SPI_H
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@ -163,10 +154,12 @@ struct spi_device {
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#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
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#define SPI_RX_DUAL 0x400 /* receive with 2 wires */
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#define SPI_RX_QUAD 0x800 /* receive with 4 wires */
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#define SPI_CS_WORD 0x1000 /* toggle cs after each word */
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int irq;
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void *controller_state;
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void *controller_data;
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char modalias[SPI_NAME_SIZE];
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const char *driver_override;
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int cs_gpio; /* chip select gpio */
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/* the statistics */
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@ -177,7 +170,6 @@ struct spi_device {
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* the controller talks to each chip, like:
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* - memory packing (12 bit samples into low bits, others zeroed)
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* - priority
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* - drop chipselect after each word
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* - chipselect delays
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* - ...
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*/
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@ -711,6 +703,8 @@ extern void spi_res_release(struct spi_controller *ctlr,
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* @delay_usecs: microseconds to delay after this transfer before
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* (optionally) changing the chipselect status, then starting
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* the next transfer or completing this @spi_message.
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* @word_delay: clock cycles to inter word delay after each word size
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* (set by bits_per_word) transmission.
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* @transfer_list: transfers are sequenced through @spi_message.transfers
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* @tx_sg: Scatterlist for transmit, currently not for client use
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* @rx_sg: Scatterlist for receive, currently not for client use
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@ -793,6 +787,7 @@ struct spi_transfer {
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u8 bits_per_word;
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u16 delay_usecs;
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u32 speed_hz;
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u16 word_delay;
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struct list_head transfer_list;
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};
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@ -1277,7 +1272,6 @@ spi_register_board_info(struct spi_board_info const *info, unsigned n)
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{ return 0; }
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#endif
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/* If you're hotplugging an adapter with devices (parport, usb, etc)
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* use spi_new_device() to describe each device. You can also call
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* spi_unregister_device() to start making that device vanish, but
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@ -1309,6 +1303,22 @@ spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer)
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return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers);
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}
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/* OF support code */
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#if IS_ENABLED(CONFIG_OF)
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/* must call put_device() when done with returned spi_device device */
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extern struct spi_device *
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of_find_spi_device_by_node(struct device_node *node);
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#else
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static inline struct spi_device *
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of_find_spi_device_by_node(struct device_node *node)
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{
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return NULL;
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}
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#endif /* IS_ENABLED(CONFIG_OF) */
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/* Compatibility layer */
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#define spi_master spi_controller
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