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Merge "drivers: pinctrl: Update gpio pdc wakeirq map for seraph"

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QCTECMDR Service 2024-09-13 11:57:20 -07:00 • committed by Gerrit - the friendly Code Review server
commit bc89b8598d
4 changed files with 24 additions and 16 deletions
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3
arch/arm64/configs/vendor/seraph_GKI.config vendored
View file

@ -6,7 +6,10 @@ CONFIG_LOCALVERSION="-gki"
# CONFIG_MODULE_SIG_ALL is not set
CONFIG_PINCTRL_MSM=m
CONFIG_PINCTRL_SERAPH=m
CONFIG_QCOM_COMMAND_DB=m
CONFIG_QCOM_GDSC_REGULATOR=m
CONFIG_QCOM_PDC=m
CONFIG_QCOM_RPMH=m
CONFIG_QCOM_SCM=m
CONFIG_QCOM_SMEM=m
CONFIG_QCOM_SOCINFO=m

31
drivers/pinctrl/qcom/pinctrl-seraph.c
View file

@ -2015,22 +2015,21 @@ static struct pinctrl_qup seraph_qup_regs[] = {
};
static const struct msm_gpio_wakeirq_map seraph_pdc_map[] = {
{ 0, 70 }, { 1, 147 }, { 2, 154 }, { 3, 94 }, { 4, 101 }, { 5, 86 },
{ 6, 159 }, { 7, 124 }, { 11, 75 }, { 12, 151 }, { 13, 80 }, { 15, 84 },
{ 16, 152 }, { 17, 153 }, { 18, 142 }, { 19, 88 }, { 20, 89 }, { 21, 143 },
{ 22, 71 }, { 23, 90 }, { 24, 144 }, { 27, 91 }, { 28, 92 }, { 29, 93 },
{ 30, 95 }, { 31, 96 }, { 32, 97 }, { 33, 155 }, { 34, 156 }, { 35, 98 },
{ 37, 157 }, { 38, 81 }, { 39, 100 }, { 40, 82 }, { 41, 158 }, { 42, 83 },
{ 43, 102 }, { 44, 85 }, { 45, 103 }, { 47, 72 }, { 48, 146 }, { 50, 161 },
{ 51, 107 }, { 54, 108 }, { 55, 109 }, { 56, 110 }, { 57, 111 }, { 58, 112 },
{ 59, 113 }, { 60, 114 }, { 61, 115 }, { 63, 117 }, { 64, 118 }, { 65, 119 },
{ 66, 120 }, { 67, 121 }, { 68, 122 }, { 69, 123 }, { 70, 87 }, { 71, 104 },
{ 72, 105 }, { 74, 106 }, { 75, 125 }, { 76, 126 }, { 77, 162 }, { 78, 163 },
{ 79, 128 }, { 81, 130 }, { 82, 127 }, { 84, 131 }, { 86, 164 }, { 87, 134 },
{ 88, 165 }, { 91, 132 }, { 92, 133 }, { 95, 136 }, { 96, 149 }, { 97, 99 },
{ 98, 139 }, { 100, 148 }, { 102, 116 }, { 103, 73 }, { 104, 129 }, { 106, 74 },
{ 107, 145 }, { 112, 76 }, { 118, 135 }, { 119, 150 }, { 120, 77 }, { 125, 78 },
{ 129, 79 }, { 131, 140 },
{ 0, 70 }, { 1, 147 }, { 2, 154 }, { 3, 94 }, { 4, 101 },
{ 6, 159 }, { 7, 124 }, { 11, 75 }, { 12, 151 }, { 13, 80 },
{ 16, 152 }, { 17, 153 }, { 18, 142 }, { 19, 88 }, { 20, 89 },
{ 22, 71 }, { 23, 90 }, { 24, 144 }, { 27, 91 }, { 28, 92 },
{ 30, 95 }, { 31, 96 }, { 32, 97 }, { 33, 155 }, { 34, 156 },
{ 37, 157 }, { 38, 81 }, { 39, 100 }, { 40, 82 }, { 41, 158 },
{ 43, 102 }, { 44, 85 }, { 45, 103 }, { 47, 72 }, { 48, 146 },
{ 51, 107 }, { 54, 108 }, { 55, 109 }, { 56, 110 }, { 57, 111 },
{ 59, 113 }, { 60, 114 }, { 61, 115 }, { 63, 117 }, { 64, 118 },
{ 66, 120 }, { 67, 121 }, { 68, 122 }, { 69, 123 }, { 70, 87 },
{ 72, 105 }, { 74, 106 }, { 75, 125 }, { 76, 126 }, { 77, 162 },
{ 79, 128 }, { 81, 130 }, { 82, 40 }, { 84, 131 }, { 86, 164 },
{ 88, 165 }, { 91, 132 }, { 92, 133 }, { 95, 136 }, { 96, 149 },
{ 98, 139 }, { 100, 148 }, { 102, 116 }, { 103, 73 }, { 104, 129 },
{ 107, 145 }, { 112, 76 }, { 118, 135 }, { 119, 150 }, { 120, 77 },
};
static const struct msm_pinctrl_soc_data seraph_pinctrl = {

3
modules.list.msm.seraph
View file

@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
# Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
qcom-scm.ko
qcom-pdc.ko
pinctrl-msm.ko
pinctrl-seraph.ko
qcom_hwspinlock.ko
@ -9,3 +10,5 @@ socinfo.ko
clk-dummy.ko
clk-qcom.ko
gdsc-regulator.ko
cmd-db.ko
qcom_rpmh.ko

3
seraph.bzl
View file

@ -13,8 +13,11 @@ def define_seraph():
"drivers/clk/qcom/gdsc-regulator.ko",
"drivers/firmware/qcom-scm.ko",
"drivers/hwspinlock/qcom_hwspinlock.ko",
"drivers/irqchip/qcom-pdc.ko",
"drivers/pinctrl/qcom/pinctrl-msm.ko",
"drivers/pinctrl/qcom/pinctrl-seraph.ko",
"drivers/soc/qcom/cmd-db.ko",
"drivers/soc/qcom/qcom_rpmh.ko",
"drivers/soc/qcom/smem.ko",
"drivers/soc/qcom/socinfo.ko",
]