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wifi: mt76: mt7603: improve watchdog reset reliablity

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[ Upstream commit c677dda165231c3efffb9de4bace249d5d2a51b9 ]

Only trigger PSE reset if PSE was stuck, otherwise it can cause DMA issues.
Trigger the PSE reset while DMA is fully stopped in order to improve
reliabilty.

Fixes: c8846e1015 ("mt76: add driver for MT7603E and MT7628/7688")
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Felix Fietkau 2023-07-28 16:04:40 +02:00 • committed by Greg Kroah-Hartman
parent e3c46ce78d
commit c2fd48179c
1 changed files with 12 additions and 17 deletions
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29
drivers/net/wireless/mediatek/mt76/mt7603/mac.c
View file

@ -1430,15 +1430,6 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
mt7603_beacon_set_timer(dev, -1, 0); mt7603_beacon_set_timer(dev, -1, 0);
if (dev->reset_cause[RESET_CAUSE_RESET_FAILED] ||
dev->cur_reset_cause == RESET_CAUSE_RX_PSE_BUSY ||
dev->cur_reset_cause == RESET_CAUSE_BEACON_STUCK ||
dev->cur_reset_cause == RESET_CAUSE_TX_HANG)
mt7603_pse_reset(dev);
if (dev->reset_cause[RESET_CAUSE_RESET_FAILED])
goto skip_dma_reset;
mt7603_mac_stop(dev); mt7603_mac_stop(dev);
mt76_clear(dev, MT_WPDMA_GLO_CFG, mt76_clear(dev, MT_WPDMA_GLO_CFG,
@ -1448,28 +1439,32 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
mt7603_irq_disable(dev, mask); mt7603_irq_disable(dev, mask);
mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_FORCE_TX_EOF);
mt7603_pse_client_reset(dev); mt7603_pse_client_reset(dev);
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true); mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true);
for (i = 0; i < __MT_TXQ_MAX; i++) for (i = 0; i < __MT_TXQ_MAX; i++)
mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);
mt7603_dma_sched_reset(dev);
mt76_tx_status_check(&dev->mt76, true);
mt76_for_each_q_rx(&dev->mt76, i) { mt76_for_each_q_rx(&dev->mt76, i) {
mt76_queue_rx_reset(dev, i); mt76_queue_rx_reset(dev, i);
} }
mt76_tx_status_check(&dev->mt76, true); if (dev->reset_cause[RESET_CAUSE_RESET_FAILED] ||
dev->cur_reset_cause == RESET_CAUSE_RX_PSE_BUSY)
mt7603_pse_reset(dev);
mt7603_dma_sched_reset(dev); if (!dev->reset_cause[RESET_CAUSE_RESET_FAILED]) {
mt7603_mac_dma_start(dev);
mt7603_mac_dma_start(dev); mt7603_irq_enable(dev, mask);
mt7603_irq_enable(dev, mask); clear_bit(MT76_RESET, &dev->mphy.state);
}
skip_dma_reset:
clear_bit(MT76_RESET, &dev->mphy.state);
mutex_unlock(&dev->mt76.mutex); mutex_unlock(&dev->mt76.mutex);
mt76_worker_enable(&dev->mt76.tx_worker); mt76_worker_enable(&dev->mt76.tx_worker);