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interconnect: qcom: cliffs: Avoid QoS programming for UFS master

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Avoid QoS programming for UFS master from HLOS.
There is an update in access policy to protect the dynattr
registers with TME access and UFS qos register falls in the
same address range. Hence UFS qos programming is moved to
TME image.

Change-Id: Iec1908c62f210f00750e772e021f8a99ba4b73ab
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
This commit is contained in:
Raviteja Laggyshetty 2024-02-12 19:10:59 +05:30
parent d9bcd54a00
commit d271560a73
1 changed files with 1 additions and 13 deletions
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14
drivers/interconnect/qcom/cliffs.c
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
*
*/
@ -98,24 +98,12 @@ static struct qcom_icc_node xm_sdc2 = {
.links = { SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_qosbox xm_ufs_mem_qos = {
.regs = icc_qnoc_qos_regs[ICC_QNOC_QOSGEN_TYPE_RPMH],
.num_ports = 1,
.offsets = { 0xf200 },
.config = &(struct qos_config) {
.prio = 2,
.urg_fwd = 0,
.prio_fwd_disable = 1,
},
};
static struct qcom_icc_node xm_ufs_mem = {
.name = "xm_ufs_mem",
.id = MASTER_UFS_MEM,
.channels = 1,
.buswidth = 16,
.noc_ops = &qcom_qnoc4_ops,
.qosbox = &xm_ufs_mem_qos,
.num_links = 1,
.links = { SLAVE_A1NOC_SNOC },
};