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Merge "Merge tag 'android14-6.1.57_r00' into branch 'android14-6.1'" into android14-6.1

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Greg Kroah-Hartman 2023-11-30 10:20:44 +00:00
commit dc61d0ccd6
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6
Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo
View file

@ -5,6 +5,6 @@ Description:
Indicates whether or not this SBE device has experienced a
timeout; i.e. the SBE did not respond within the time allotted
by the driver. A value of 1 indicates that a timeout has
ocurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has ocurred, or if one
has, more recent transfers have completed successful.
occurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has occurred, or if one
has, more recent transfers have completed successfully.

15
Documentation/ABI/testing/sysfs-devices-system-cpu
View file

@ -513,17 +513,18 @@ Description: information about CPUs heterogeneity.
cpu_capacity: capacity of cpuX.
What: /sys/devices/system/cpu/vulnerabilities
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
/sys/devices/system/cpu/vulnerabilities/l1tf
/sys/devices/system/cpu/vulnerabilities/mds
/sys/devices/system/cpu/vulnerabilities/srbds
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
/sys/devices/system/cpu/vulnerabilities/retbleed
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/srbds
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
Date: January 2018
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Information about CPU vulnerabilities

2
Documentation/ABI/testing/sysfs-driver-chromeos-acpi
View file

@ -134,4 +134,4 @@ KernelVersion: 5.19
Description:
Returns the verified boot data block shared between the
firmware verification step and the kernel verification step
(binary).
(hex dump).

9
Documentation/admin-guide/cgroup-v1/memory.rst
View file

@ -91,8 +91,13 @@ Brief summary of control files.
memory.oom_control set/show oom controls.
memory.numa_stat show the number of memory usage per numa
node
memory.kmem.limit_in_bytes This knob is deprecated and writing to
it will return -ENOTSUPP.
memory.kmem.limit_in_bytes Deprecated knob to set and read the kernel
memory hard limit. Kernel hard limit is not
supported since 5.16. Writing any value to
do file will not have any effect same as if
nokmem kernel parameter was specified.
Kernel memory is still charged and reported
by memory.kmem.usage_in_bytes.
memory.kmem.usage_in_bytes show current kernel memory allocation
memory.kmem.failcnt show the number of kernel memory usage
hits limits

109
Documentation/admin-guide/hw-vuln/gather_data_sampling.rst Normal file
View file

@ -0,0 +1,109 @@
.. SPDX-License-Identifier: GPL-2.0
GDS - Gather Data Sampling
==========================
Gather Data Sampling is a hardware vulnerability which allows unprivileged
speculative access to data which was previously stored in vector registers.
Problem
-------
When a gather instruction performs loads from memory, different data elements
are merged into the destination vector register. However, when a gather
instruction that is transiently executed encounters a fault, stale data from
architectural or internal vector registers may get transiently forwarded to the
destination vector register instead. This will allow a malicious attacker to
infer stale data using typical side channel techniques like cache timing
attacks. GDS is a purely sampling-based attack.
The attacker uses gather instructions to infer the stale vector register data.
The victim does not need to do anything special other than use the vector
registers. The victim does not need to use gather instructions to be
vulnerable.
Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
are possible.
Attack scenarios
----------------
Without mitigation, GDS can infer stale data across virtually all
permission boundaries:
Non-enclaves can infer SGX enclave data
Userspace can infer kernel data
Guests can infer data from hosts
Guest can infer guest from other guests
Users can infer data from other users
Because of this, it is important to ensure that the mitigation stays enabled in
lower-privilege contexts like guests and when running outside SGX enclaves.
The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
that guests are not allowed to disable the GDS mitigation. If a host erred and
allowed this, a guest could theoretically disable GDS mitigation, mount an
attack, and re-enable it.
Mitigation mechanism
--------------------
This issue is mitigated in microcode. The microcode defines the following new
bits:
================================ === ============================
IA32_ARCH_CAPABILITIES[GDS_CTRL] R/O Enumerates GDS vulnerability
and mitigation support.
IA32_ARCH_CAPABILITIES[GDS_NO] R/O Processor is not vulnerable.
IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
0 by default.
IA32_MCU_OPT_CTRL[GDS_MITG_LOCK] R/W Locks GDS_MITG_DIS=0. Writes
to GDS_MITG_DIS are ignored
Can't be cleared once set.
================================ === ============================
GDS can also be mitigated on systems that don't have updated microcode by
disabling AVX. This can be done by setting gather_data_sampling="force" or
"clearcpuid=avx" on the kernel command-line.
If used, these options will disable AVX use by turning off XSAVE YMM support.
However, the processor will still enumerate AVX support. Userspace that
does not follow proper AVX enumeration to check both AVX *and* XSAVE YMM
support will break.
Mitigation control on the kernel command line
---------------------------------------------
The mitigation can be disabled by setting "gather_data_sampling=off" or
"mitigations=off" on the kernel command line. Not specifying either will default
to the mitigation being enabled. Specifying "gather_data_sampling=force" will
use the microcode mitigation when available or disable AVX on affected systems
where the microcode hasn't been updated to include the mitigation.
GDS System Information
------------------------
The kernel provides vulnerability status information through sysfs. For
GDS this can be accessed by the following sysfs file:
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
The possible values contained in this file are:
============================== =============================================
Not affected Processor not vulnerable.
Vulnerable Processor vulnerable and mitigation disabled.
Vulnerable: No microcode Processor vulnerable and microcode is missing
mitigation.
Mitigation: AVX disabled,
no microcode Processor is vulnerable and microcode is missing
mitigation. AVX disabled as mitigation.
Mitigation: Microcode Processor is vulnerable and mitigation is in
effect.
Mitigation: Microcode (locked) Processor is vulnerable and mitigation is in
effect and cannot be disabled.
Unknown: Dependent on
hypervisor status Running on a virtual guest processor that is
affected but with no way to know if host
processor is mitigated or vulnerable.
============================== =============================================
GDS Default mitigation
----------------------
The updated microcode will enable the mitigation by default. The kernel's
default action is to leave the mitigation enabled.

2
Documentation/admin-guide/hw-vuln/index.rst
View file

@ -19,3 +19,5 @@ are configurable at compile, boot or run time.
l1d_flush.rst
processor_mmio_stale_data.rst
cross-thread-rsb.rst
gather_data_sampling.rst
srso

133
Documentation/admin-guide/hw-vuln/srso.rst Normal file
View file

@ -0,0 +1,133 @@
.. SPDX-License-Identifier: GPL-2.0
Speculative Return Stack Overflow (SRSO)
========================================
This is a mitigation for the speculative return stack overflow (SRSO)
vulnerability found on AMD processors. The mechanism is by now the well
known scenario of poisoning CPU functional units - the Branch Target
Buffer (BTB) and Return Address Predictor (RAP) in this case - and then
tricking the elevated privilege domain (the kernel) into leaking
sensitive data.
AMD CPUs predict RET instructions using a Return Address Predictor (aka
Return Address Stack/Return Stack Buffer). In some cases, a non-architectural
CALL instruction (i.e., an instruction predicted to be a CALL but is
not actually a CALL) can create an entry in the RAP which may be used
to predict the target of a subsequent RET instruction.
The specific circumstances that lead to this varies by microarchitecture
but the concern is that an attacker can mis-train the CPU BTB to predict
non-architectural CALL instructions in kernel space and use this to
control the speculative target of a subsequent kernel RET, potentially
leading to information disclosure via a speculative side-channel.
The issue is tracked under CVE-2023-20569.
Affected processors
-------------------
AMD Zen, generations 1-4. That is, all families 0x17 and 0x19. Older
processors have not been investigated.
System information and options
------------------------------
First of all, it is required that the latest microcode be loaded for
mitigations to be effective.
The sysfs file showing SRSO mitigation status is:
/sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
The possible values in this file are:
- 'Not affected' The processor is not vulnerable
- 'Vulnerable: no microcode' The processor is vulnerable, no
microcode extending IBPB functionality
to address the vulnerability has been
applied.
- 'Mitigation: microcode' Extended IBPB functionality microcode
patch has been applied. It does not
address User->Kernel and Guest->Host
transitions protection but it does
address User->User and VM->VM attack
vectors.
(spec_rstack_overflow=microcode)
- 'Mitigation: safe RET' Software-only mitigation. It complements
the extended IBPB microcode patch
functionality by addressing User->Kernel
and Guest->Host transitions protection.
Selected by default or by
spec_rstack_overflow=safe-ret
- 'Mitigation: IBPB' Similar protection as "safe RET" above
but employs an IBPB barrier on privilege
domain crossings (User->Kernel,
Guest->Host).
(spec_rstack_overflow=ibpb)
- 'Mitigation: IBPB on VMEXIT' Mitigation addressing the cloud provider
scenario - the Guest->Host transitions
only.
(spec_rstack_overflow=ibpb-vmexit)
In order to exploit vulnerability, an attacker needs to:
- gain local access on the machine
- break kASLR
- find gadgets in the running kernel in order to use them in the exploit
- potentially create and pin an additional workload on the sibling
thread, depending on the microarchitecture (not necessary on fam 0x19)
- run the exploit
Considering the performance implications of each mitigation type, the
default one is 'Mitigation: safe RET' which should take care of most
attack vectors, including the local User->Kernel one.
As always, the user is advised to keep her/his system up-to-date by
applying software updates regularly.
The default setting will be reevaluated when needed and especially when
new attack vectors appear.
As one can surmise, 'Mitigation: safe RET' does come at the cost of some
performance depending on the workload. If one trusts her/his userspace
and does not want to suffer the performance impact, one can always
disable the mitigation with spec_rstack_overflow=off.
Similarly, 'Mitigation: IBPB' is another full mitigation type employing
an indrect branch prediction barrier after having applied the required
microcode patch for one's system. This mitigation comes also at
a performance cost.
Mitigation: safe RET
--------------------
The mitigation works by ensuring all RET instructions speculate to
a controlled location, similar to how speculation is controlled in the
retpoline sequence. To accomplish this, the __x86_return_thunk forces
the CPU to mispredict every function return using a 'safe return'
sequence.
To ensure the safety of this mitigation, the kernel must ensure that the
safe return sequence is itself free from attacker interference. In Zen3
and Zen4, this is accomplished by creating a BTB alias between the
untraining function srso_alias_untrain_ret() and the safe return
function srso_alias_safe_ret() which results in evicting a potentially
poisoned BTB entry and using that safe one for all function returns.
In older Zen1 and Zen2, this is accomplished using a reinterpretation
technique similar to Retbleed one: srso_untrain_ret() and
srso_safe_ret().

63
Documentation/admin-guide/kernel-parameters.txt
View file

@ -323,6 +323,7 @@
option with care.
pgtbl_v1 - Use v1 page table for DMA-API (Default).
pgtbl_v2 - Use v2 page table for DMA-API.
irtcachedis - Disable Interrupt Remapping Table (IRT) caching.
amd_iommu_dump= [HW,X86-64]
Enable AMD IOMMU driver option to dump the ACPI table
@ -1597,6 +1598,26 @@
Format: off | on
default: on
gather_data_sampling=
[X86,INTEL] Control the Gather Data Sampling (GDS)
mitigation.
Gather Data Sampling is a hardware vulnerability which
allows unprivileged speculative access to data which was
previously stored in vector registers.
This issue is mitigated by default in updated microcode.
The mitigation may have a performance impact but can be
disabled. On systems without the microcode mitigation
disabling AVX serves as a mitigation.
force: Disable AVX to mitigate systems without
microcode mitigation. No effect if the microcode
mitigation is present. Known to cause crashes in
userspace with buggy AVX enumeration.
off: Disable GDS mitigation.
gcov_persist= [GCOV] When non-zero (default), profiling data for
kernel modules is saved and remains accessible via
debugfs, even when the module is unloaded/reloaded.
@ -3265,24 +3286,25 @@
Disable all optional CPU mitigations. This
improves system performance, but it may also
expose users to several CPU vulnerabilities.
Equivalent to: nopti [X86,PPC]
if nokaslr then kpti=0 [ARM64]
nospectre_v1 [X86,PPC]
nobp=0 [S390]
nospectre_v2 [X86,PPC,S390,ARM64]
spectre_v2_user=off [X86]
spec_store_bypass_disable=off [X86,PPC]
ssbd=force-off [ARM64]
nospectre_bhb [ARM64]
Equivalent to: if nokaslr then kpti=0 [ARM64]
gather_data_sampling=off [X86]
kvm.nx_huge_pages=off [X86]
l1tf=off [X86]
mds=off [X86]
tsx_async_abort=off [X86]
kvm.nx_huge_pages=off [X86]
srbds=off [X86,INTEL]
mmio_stale_data=off [X86]
no_entry_flush [PPC]
no_uaccess_flush [PPC]
mmio_stale_data=off [X86]
nobp=0 [S390]
nopti [X86,PPC]
nospectre_bhb [ARM64]
nospectre_v1 [X86,PPC]
nospectre_v2 [X86,PPC,S390,ARM64]
retbleed=off [X86]
spec_store_bypass_disable=off [X86,PPC]
spectre_v2_user=off [X86]
srbds=off [X86,INTEL]
ssbd=force-off [ARM64]
tsx_async_abort=off [X86]
Exceptions:
This does not have any effect on
@ -5801,6 +5823,17 @@
Not specifying this option is equivalent to
spectre_v2_user=auto.
spec_rstack_overflow=
[X86] Control RAS overflow mitigation on AMD Zen CPUs
off - Disable mitigation
microcode - Enable microcode mitigation only
safe-ret - Enable sw-only safe RET mitigation (default)
ibpb - Enable mitigation by issuing IBPB on
kernel entry
ibpb-vmexit - Issue IBPB only on VMEXIT
(cloud-specific mitigation)
spec_store_bypass_disable=
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
(Speculative Store Bypass vulnerability)
@ -6168,10 +6201,6 @@
-1: disable all critical trip points in all thermal zones
<degrees C>: override all critical trip points
thermal.nocrt= [HW,ACPI]
Set to disable actions on ACPI thermal zone
critical and hot trip points.
thermal.off= [HW,ACPI]
1: disable ACPI thermal control

7
Documentation/arm64/silicon-errata.rst
View file

@ -138,6 +138,10 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-500 | #841119,826419 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-600 | #1076982,1209401| N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-700 | #2268618,2812531| N/A |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
+----------------+-----------------+-----------------+-----------------------------+
@ -187,6 +191,9 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
| | Hip09 SMMU PMCG | | |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
+----------------+-----------------+-----------------+-----------------------------+

2
Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
View file

@ -16,8 +16,6 @@ description: |
reads required input clock frequencies from the devicetree and acts as clock
provider for all clock consumers of PS clocks.
select: false
properties:
compatible:
const: xlnx,versal-clk

1
Documentation/devicetree/bindings/extcon/maxim,max77843.yaml
View file

@ -23,6 +23,7 @@ properties:
connector:
$ref: /schemas/connector/usb-connector.yaml#
unevaluatedProperties: false
ports:
$ref: /schemas/graph.yaml#/properties/ports

46
Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt
View file

@ -23,6 +23,9 @@ Optional properties:
1 = active low.
- irda-mode-ports: An array that lists the indices of the port that
should operate in IrDA mode.
- nxp,modem-control-line-ports: An array that lists the indices of the port that
should have shared GPIO lines configured as
modem control lines.
Example:
sc16is750: sc16is750@51 {
@ -35,6 +38,26 @@ Example:
#gpio-cells = <2>;
};
sc16is752: sc16is752@53 {
compatible = "nxp,sc16is752";
reg = <0x53>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
gpio-controller; /* Port 0 as GPIOs */
#gpio-cells = <2>;
};
sc16is752: sc16is752@54 {
compatible = "nxp,sc16is752";
reg = <0x54>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
};
* spi as bus
Required properties:
@ -59,6 +82,9 @@ Optional properties:
1 = active low.
- irda-mode-ports: An array that lists the indices of the port that
should operate in IrDA mode.
- nxp,modem-control-line-ports: An array that lists the indices of the port that
should have shared GPIO lines configured as
modem control lines.
Example:
sc16is750: sc16is750@0 {
@ -70,3 +96,23 @@ Example:
gpio-controller;
#gpio-cells = <2>;
};
sc16is752: sc16is752@1 {
compatible = "nxp,sc16is752";
reg = <1>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
gpio-controller; /* Port 0 as GPIOs */
#gpio-cells = <2>;
};
sc16is752: sc16is752@2 {
compatible = "nxp,sc16is752";
reg = <2>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
};

4
Documentation/scsi/scsi_mid_low_api.rst
View file

@ -1190,11 +1190,11 @@ Members of interest:
- pointer to scsi_device object that this command is
associated with.
resid
- an LLD should set this signed integer to the requested
- an LLD should set this unsigned integer to the requested
transfer length (i.e. 'request_bufflen') less the number
of bytes that are actually transferred. 'resid' is
preset to 0 so an LLD can ignore it if it cannot detect
underruns (overruns should be rare). If possible an LLD
underruns (overruns should not be reported). An LLD
should set 'resid' prior to invoking 'done'. The most
interesting case is data transfers from a SCSI target
device (e.g. READs) that underrun.

2
MAINTAINERS
View file

@ -6034,7 +6034,7 @@ S: Supported
F: Documentation/networking/devlink
F: include/net/devlink.h
F: include/uapi/linux/devlink.h
F: net/core/devlink.c
F: net/devlink/
DH ELECTRONICS IMX6 DHCOM BOARD SUPPORT
M: Christoph Niedermaier <cniedermaier@dh-electronics.com>

8
Makefile
View file

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 43
SUBLEVEL = 57
EXTRAVERSION =
NAME = Curry Ramen
@ -1356,7 +1356,7 @@ prepare0: archprepare
# All the preparing..
prepare: prepare0
ifdef CONFIG_RUST
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh
$(Q)$(MAKE) $(build)=rust
endif
@ -1858,7 +1858,7 @@ $(DOC_TARGETS):
# "Is Rust available?" target
PHONY += rustavailable
rustavailable:
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v && echo "Rust is available!"
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh && echo "Rust is available!"
# Documentation target
#
@ -1982,7 +1982,9 @@ quiet_cmd_depmod = DEPMOD $(MODLIB)
modules_install:
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst
ifndef modules_sign_only
$(call cmd,depmod)
endif
else # CONFIG_MODULES

29
android/abi_gki_aarch64.stg
View file

@ -164527,6 +164527,12 @@ member {
type_id: 0x03913382
offset: 64
}
member {
id: 0x9a2ccf59
name: "resizing"
type_id: 0x74d29cf1
offset: 96
}
member {
id: 0x7f319b20
name: "resolution"
@ -258975,6 +258981,7 @@ struct_union {
member_id: 0x2d2d0138
member_id: 0xe7102ce7
member_id: 0x9fc7d460
member_id: 0x9a2ccf59
member_id: 0x3dac837e
member_id: 0xaa1570ba
member_id: 0xad8983a9
@ -352519,6 +352526,16 @@ elf_symbol {
type_id: 0x451c3ee7
full_name: "dma_buf_map_attachment"
}
elf_symbol {
id: 0x25104c49
name: "dma_buf_map_attachment_unlocked"
is_defined: true
symbol_type: FUNCTION
crc: 0xedb9c6b4
namespace: "DMA_BUF"
type_id: 0x451c3ee7
full_name: "dma_buf_map_attachment_unlocked"
}
elf_symbol {
id: 0xc99a7edf
name: "dma_buf_mmap"
@ -352578,6 +352595,16 @@ elf_symbol {
type_id: 0x17ffed59
full_name: "dma_buf_unmap_attachment"
}
elf_symbol {
id: 0x68016e57
name: "dma_buf_unmap_attachment_unlocked"
is_defined: true
symbol_type: FUNCTION
crc: 0xffe8aa2b
namespace: "DMA_BUF"
type_id: 0x17ffed59
full_name: "dma_buf_unmap_attachment_unlocked"
}
elf_symbol {
id: 0xe8233473
name: "dma_buf_unpin"
@ -399099,12 +399126,14 @@ interface {
symbol_id: 0xe6ad1d16
symbol_id: 0xda3a8347
symbol_id: 0xb3e02cd2
symbol_id: 0x25104c49
symbol_id: 0xc99a7edf
symbol_id: 0xdcb8ed3c
symbol_id: 0x4ec1de19
symbol_id: 0xe5cfd7ac
symbol_id: 0x77d18a9c
symbol_id: 0xd0deb542
symbol_id: 0x68016e57
symbol_id: 0xe8233473
symbol_id: 0x710f1fc2
symbol_id: 0xaa54a71f

3
android/abi_gki_aarch64_db845c
View file

@ -197,6 +197,8 @@
dma_async_device_register
dma_async_tx_descriptor_init
dma_buf_export
dma_buf_map_attachment_unlocked
dma_buf_unmap_attachment_unlocked
dma_fence_context_alloc
dma_fence_init
dma_fence_release
@ -523,6 +525,7 @@
param_ops_uint
pci_clear_master
pci_disable_device
pcie_capability_clear_and_set_word
pcie_capability_read_word
pcie_capability_write_word
pci_enable_device

3
arch/Kconfig
View file

@ -285,6 +285,9 @@ config ARCH_HAS_DMA_SET_UNCACHED
config ARCH_HAS_DMA_CLEAR_UNCACHED
bool
config ARCH_HAS_CPU_FINALIZE_INIT
bool
# Select if arch init_task must go in the __init_task_data section
config ARCH_TASK_STRUCT_ON_STACK
bool

20
arch/alpha/include/asm/bugs.h
View file

@ -1,20 +0,0 @@
/*
* include/asm-alpha/bugs.h
*
* Copyright (C) 1994 Linus Torvalds
*/
/*
* This is included by init/main.c to check for architecture-dependent bugs.
*
* Needs:
* void check_bugs(void);
*/
/*
* I don't know of any alpha bugs yet.. Nice chip
*/
static void check_bugs(void)
{
}

3
arch/alpha/kernel/setup.c
View file

@ -385,8 +385,7 @@ setup_memory(void *kernel_end)
#endif /* CONFIG_BLK_DEV_INITRD */
}
int __init
page_is_ram(unsigned long pfn)
int page_is_ram(unsigned long pfn)
{
struct memclust_struct * cluster;
struct memdesc_struct * memdesc;

6
arch/arc/include/asm/atomic-llsc.h
View file

@ -18,7 +18,7 @@ static inline void arch_atomic_##op(int i, atomic_t *v) \
: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
[i] "ir" (i) \
: "cc"); \
: "cc", "memory"); \
} \
#define ATOMIC_OP_RETURN(op, asm_op) \
@ -34,7 +34,7 @@ static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \
: [val] "=&r" (val) \
: [ctr] "r" (&v->counter), \
[i] "ir" (i) \
: "cc"); \
: "cc", "memory"); \
\
return val; \
}
@ -56,7 +56,7 @@ static inline int arch_atomic_fetch_##op##_relaxed(int i, atomic_t *v) \
[orig] "=&r" (orig) \
: [ctr] "r" (&v->counter), \
[i] "ir" (i) \
: "cc"); \
: "cc", "memory"); \
\
return orig; \
}

6
arch/arc/include/asm/atomic64-arcv2.h
View file

@ -60,7 +60,7 @@ static inline void arch_atomic64_##op(s64 a, atomic64_t *v) \
" bnz 1b \n" \
: "=&r"(val) \
: "r"(&v->counter), "ir"(a) \
: "cc"); \
: "cc", "memory"); \
} \
#define ATOMIC64_OP_RETURN(op, op1, op2) \
@ -77,7 +77,7 @@ static inline s64 arch_atomic64_##op##_return_relaxed(s64 a, atomic64_t *v) \
" bnz 1b \n" \
: [val] "=&r"(val) \
: "r"(&v->counter), "ir"(a) \
: "cc"); /* memory clobber comes from smp_mb() */ \
: "cc", "memory"); \
\
return val; \
}
@ -99,7 +99,7 @@ static inline s64 arch_atomic64_fetch_##op##_relaxed(s64 a, atomic64_t *v) \
" bnz 1b \n" \
: "=&r"(orig), "=&r"(val) \
: "r"(&v->counter), "ir"(a) \
: "cc"); /* memory clobber comes from smp_mb() */ \
: "cc", "memory"); \
\
return orig; \
}

1
arch/arm/Kconfig
View file

@ -5,6 +5,7 @@ config ARM
select ARCH_32BIT_OFF_T
select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE if HAVE_KRETPROBES && FRAME_POINTER && !ARM_UNWIND
select ARCH_HAS_BINFMT_FLAT
select ARCH_HAS_CPU_FINALIZE_INIT if MMU
select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_HAS_DEBUG_VIRTUAL if MMU
select ARCH_HAS_DMA_WRITE_COMBINE if !ARM_DMA_MEM_BUFFERABLE

8
arch/arm/boot/dts/Makefile
View file

@ -331,6 +331,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-iconnect.dtb \
kirkwood-iomega_ix2_200.dtb \
kirkwood-is2.dtb \
kirkwood-km_fixedeth.dtb \
kirkwood-km_kirkwood.dtb \
kirkwood-l-50.dtb \
kirkwood-laplug.dtb \
@ -861,7 +862,10 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
am3517-craneboard.dtb \
am3517-evm.dtb \
am3517_mt_ventoux.dtb \
logicpd-torpedo-35xx-devkit.dtb \
logicpd-torpedo-37xx-devkit.dtb \
logicpd-torpedo-37xx-devkit-28.dtb \
logicpd-som-lv-35xx-devkit.dtb \
logicpd-som-lv-37xx-devkit.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
@ -1527,6 +1531,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-388-helios4.dtb \
armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_39X) += \
armada-390-db.dtb \
armada-395-gp.dtb \
armada-398-db.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
@ -1556,6 +1562,7 @@ dtb-$(CONFIG_MACH_DOVE) += \
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt2701-evb.dtb \
mt6580-evbp1.dtb \
mt6582-prestigio-pmt5008-3g.dtb \
mt6589-aquaris5.dtb \
mt6589-fairphone-fp1.dtb \
mt6592-evb.dtb \
@ -1608,6 +1615,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
aspeed-bmc-inspur-on5263m5.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \

3
arch/arm/boot/dts/am335x-guardian.dts
View file

@ -103,8 +103,9 @@
};
guardian_beeper: dmtimer-pwm@7 {
guardian_beeper: pwm-7 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&guardian_beeper_pins>;

2
arch/arm/boot/dts/am3517-evm.dts
View file

@ -150,7 +150,7 @@
enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */
};
pwm11: dmtimer-pwm@11 {
pwm11: pwm-11 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;

3
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
View file

@ -19,7 +19,8 @@
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
};
gpio-keys {

13
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
View file

@ -46,3 +46,16 @@
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

13
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
View file

@ -83,3 +83,16 @@
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

4
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
View file

@ -135,8 +135,8 @@
label = "lan4";
};
port@5 {
reg = <5>;
port@8 {
reg = <8>;
label = "cpu";
ethernet = <&gmac0>;
};

5
arch/arm/boot/dts/bcm53573.dtsi
View file

@ -127,6 +127,9 @@
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
usb2: usb2@4000 {
@ -156,8 +159,6 @@
};
ohci: usb@d000 {
#usb-cells = <0>;
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

6
arch/arm/boot/dts/bcm947189acdbmr.dts
View file

@ -60,9 +60,9 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 21 0>;
gpio-miso = <&chipcommon 22 0>;
gpio-mosi = <&chipcommon 23 0>;
sck-gpios = <&chipcommon 21 0>;
miso-gpios = <&chipcommon 22 0>;
mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/exynos4210-i9100.dts
View file

@ -201,8 +201,8 @@
power-on-delay = <10>;
reset-delay = <10>;
panel-width-mm = <90>;
panel-height-mm = <154>;
panel-width-mm = <56>;
panel-height-mm = <93>;
display-timings {
timing {

2
arch/arm/boot/dts/imx50-kobo-aura.dts
View file

@ -26,7 +26,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
on {
led-on {
label = "kobo_aura:orange:on";
gpios = <&gpio6 24 GPIO_ACTIVE_LOW>;
panic-indicator;

10
arch/arm/boot/dts/imx53-cx9020.dts
View file

@ -86,27 +86,27 @@
leds {
compatible = "gpio-leds";
pwr-r {
led-pwr-r {
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
pwr-g {
led-pwr-g {
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
pwr-b {
led-pwr-b {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sd1-b {
led-sd1-b {
linux,default-trigger = "mmc0";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
};
sd2-b {
led-sd2-b {
linux,default-trigger = "mmc1";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx53-m53evk.dts
View file

@ -52,13 +52,13 @@
pinctrl-names = "default";
pinctrl-0 = <&led_pin_gpio>;
user1 {
led-user1 {
label = "user1";
gpios = <&gpio2 8 0>;
linux,default-trigger = "heartbeat";
};
user2 {
led-user2 {
label = "user2";
gpios = <&gpio2 9 0>;
linux,default-trigger = "heartbeat";

6
arch/arm/boot/dts/imx53-m53menlo.dts
View file

@ -34,19 +34,19 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-user1 {
label = "TestLed601";
gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
user2 {
led-user2 {
label = "TestLed602";
gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
eth {
led-eth {
label = "EthLedYe";
gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "netdev";

2
arch/arm/boot/dts/imx53-tx53.dtsi
View file

@ -94,7 +94,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stk5led>;
user {
led-user {
label = "Heartbeat";
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx53-usbarmory.dts
View file

@ -67,7 +67,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "LED";
gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";

6
arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi
View file

@ -211,17 +211,17 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_q7_gpio1 &pinctrl_q7_gpio3 &pinctrl_q7_gpio5>;
alarm1 {
led-alarm1 {
label = "alarm:red";
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
};
alarm2 {
led-alarm2 {
label = "alarm:yellow";
gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
};
alarm3 {
led-alarm3 {
label = "alarm:blue";
gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx6dl-prtrvt.dts
View file

@ -124,6 +124,10 @@
status = "disabled";
};
&usbotg {
disable-over-current;
};
&vpu {
status = "disabled";
};

4
arch/arm/boot/dts/imx6dl-riotboard.dts
View file

@ -25,14 +25,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";

6
arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
View file

@ -274,7 +274,7 @@
#address-cells = <1>;
#size-cells = <0>;
chan@0 {
led@0 {
chan-name = "R";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
@ -282,7 +282,7 @@
color = <LED_COLOR_ID_RED>;
};
chan@1 {
led@1 {
chan-name = "G";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
@ -290,7 +290,7 @@
color = <LED_COLOR_ID_GREEN>;
};
chan@2 {
led@2 {
chan-name = "B";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;

6
arch/arm/boot/dts/imx6q-gw5400-a.dts
View file

@ -34,20 +34,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6q-h100.dts
View file

@ -76,19 +76,19 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_h100_leds>;
led0: power {
led0: led-power {
label = "power";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
default-state = "on";
};
led1: stream {
led1: led-stream {
label = "stream";
gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led2: rec {
led2: led-rec {
label = "rec";
gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
default-state = "off";

4
arch/arm/boot/dts/imx6q-kp.dtsi
View file

@ -66,14 +66,14 @@
leds {
compatible = "gpio-leds";
green {
led-green {
label = "led1";
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
red {
led-red {
label = "led0";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";

4
arch/arm/boot/dts/imx6q-marsboard.dts
View file

@ -73,14 +73,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-user1 {
label = "imx6:green:user1";
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
user2 {
led-user2 {
label = "imx6:green:user2";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";

2
arch/arm/boot/dts/imx6q-tbs2910.dts
View file

@ -49,7 +49,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
blue {
led-blue {
label = "blue_status_led";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
default-state = "keep";

4
arch/arm/boot/dts/imx6qdl-emcon.dtsi
View file

@ -46,14 +46,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_som_leds>;
green {
led-green {
label = "som:green";
gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
red {
led-red {
label = "som:red";
gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
default-state = "keep";

4
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
View file

@ -71,14 +71,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View file

@ -80,20 +80,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
View file

@ -80,20 +80,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
View file

@ -81,20 +81,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-gw551x.dtsi
View file

@ -115,7 +115,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
default-state = "on";

6
arch/arm/boot/dts/imx6qdl-gw552x.dtsi
View file

@ -72,20 +72,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw553x.dtsi
View file

@ -113,14 +113,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw560x.dtsi
View file

@ -139,20 +139,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-gw5903.dtsi
View file

@ -123,7 +123,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
View file

@ -120,20 +120,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw5907.dtsi
View file

@ -71,14 +71,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5910.dtsi
View file

@ -74,20 +74,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5912.dtsi
View file

@ -72,20 +72,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw5913.dtsi
View file

@ -71,14 +71,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

10
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
View file

@ -85,31 +85,31 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
j14-pin1 {
led-j14-pin1 {
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j14-pin3 {
led-j14-pin3 {
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j14-pins8-9 {
led-j14-pins8-9 {
gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j46-pin2 {
led-j46-pin2 {
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j46-pin3 {
led-j46-pin3 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View file

@ -181,13 +181,13 @@
leds {
compatible = "gpio-leds";
speaker-enable {
led-speaker-enable {
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
default-state = "off";
};
ttymxc4-rs232 {
led-ttymxc4-rs232 {
gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
default-state = "on";

8
arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi
View file

@ -25,17 +25,17 @@
pinctrl-0 = <&pinctrl_gpioleds>;
status = "disabled";
red {
led-red {
label = "phyboard-mira:red";
gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
};
green {
led-green {
label = "phyboard-mira:green";
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
};
blue {
led-blue {
label = "phyboard-mira:blue";
gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
@ -182,7 +182,7 @@
pinctrl-0 = <&pinctrl_rtc_int>;
reg = <0x68>;
interrupt-parent = <&gpio7>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
status = "disabled";
};
};

4
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View file

@ -47,12 +47,12 @@
pinctrl-0 = <&pinctrl_leds>;
compatible = "gpio-leds";
led_green: green {
led_green: led-green {
label = "phyflex:green";
gpios = <&gpio1 30 0>;
};
led_red: red {
led_red: led-red {
label = "phyflex:red";
gpios = <&gpio2 31 0>;
};

11
arch/arm/boot/dts/imx6qdl-prti6q.dtsi
View file

@ -69,6 +69,7 @@
vbus-supply = <&reg_usb_h1_vbus>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -78,10 +79,18 @@
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

2
arch/arm/boot/dts/imx6qdl-rex.dtsi
View file

@ -55,7 +55,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
led0: usr {
led0: led-usr {
label = "usr";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View file

@ -21,7 +21,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
user {
led-user {
label = "debug";
gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
};

2
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View file

@ -130,7 +130,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
red {
led-red {
gpios = <&gpio1 2 0>;
default-state = "on";
};

4
arch/arm/boot/dts/imx6qdl-ts7970.dtsi
View file

@ -73,13 +73,13 @@
default-state = "off";
};
en-usb-5v {
en-usb-5v-led {
label = "en-usb-5v";
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
sel_dc_usb {
sel-dc-usb-led {
label = "sel_dc_usb";
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View file

@ -92,7 +92,7 @@
leds {
compatible = "gpio-leds";
user_led: user {
user_led: led-user {
label = "Heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_user_led>;

2
arch/arm/boot/dts/imx6sl-evk.dts
View file

@ -33,7 +33,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx6sll-evk.dts
View file

@ -37,7 +37,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx6sll.dtsi
View file

@ -552,7 +552,7 @@
reg = <0x020ca000 0x1000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USBPHY2>;
phy-reg_3p0-supply = <&reg_3p0>;
phy-3p0-supply = <&reg_3p0>;
fsl,anatop = <&anatop>;
};

2
arch/arm/boot/dts/imx6sx-sabreauto.dts
View file

@ -20,7 +20,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

4
arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
View file

@ -15,14 +15,14 @@
leds {
compatible = "gpio-leds";
red {
led-red {
label = "udoo-neo:red:mmc";
gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
orange {
led-orange {
label = "udoo-neo:orange:user";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
default-state = "keep";

6
arch/arm/boot/dts/imx6sx.dtsi
View file

@ -981,6 +981,8 @@
<&clks IMX6SX_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
@ -993,6 +995,8 @@
<&clks IMX6SX_CLK_USDHC2>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
@ -1005,6 +1009,8 @@
<&clks IMX6SX_CLK_USDHC3>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};

2
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
View file

@ -30,7 +30,7 @@
pinctrl-0 = <&pinctrl_gpioleds_som>;
compatible = "gpio-leds";
phycore-green {
led-phycore-green {
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};

2
arch/arm/boot/dts/imx6ul-tx6ul.dtsi
View file

@ -131,7 +131,7 @@
leds {
compatible = "gpio-leds";
user_led: user {
user_led: led-user {
label = "Heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;

6
arch/arm/boot/dts/imx7s.dtsi
View file

@ -1184,6 +1184,8 @@
<&clks IMX7D_USDHC1_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1196,6 +1198,8 @@
<&clks IMX7D_USDHC2_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1208,6 +1212,8 @@
<&clks IMX7D_USDHC3_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};

2
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
View file

@ -59,7 +59,7 @@
};
};
pwm10: dmtimer-pwm {
pwm10: pwm-10 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;

48
arch/arm/boot/dts/motorola-mapphone-common.dtsi
View file

@ -133,7 +133,7 @@
dais = <&mcbsp2_port>, <&mcbsp3_port>;
};
pwm8: dmtimer-pwm-8 {
pwm8: pwm-8 {
pinctrl-names = "default";
pinctrl-0 = <&vibrator_direction_pin>;
@ -143,7 +143,7 @@
ti,clock-source = <0x01>;
};
pwm9: dmtimer-pwm-9 {
pwm9: pwm-9 {
pinctrl-names = "default";
pinctrl-0 = <&vibrator_enable_pin>;
@ -352,13 +352,13 @@
&omap4_pmx_core {
/* hdmi_hpd.gpio_63 */
hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
hdmi_hpd_gpio: hdmi-hpd-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
>;
};
hdq_pins: pinmux_hdq_pins {
hdq_pins: hdq-pins {
pinctrl-single,pins = <
/* 0x4a100120 hdq_sio.hdq_sio aa27 */
OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
@ -366,7 +366,7 @@
};
/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
dss_hdmi_pins: pinmux_dss_hdmi_pins {
dss_hdmi_pins: dss-hdmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
@ -380,7 +380,7 @@
* devices. Off mode value should be tested if we have off mode working
* later on.
*/
mmc3_pins: pinmux_mmc3_pins {
mmc3_pins: mmc3-pins {
pinctrl-single,pins = <
/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
@ -406,40 +406,40 @@
};
/* gpmc_ncs0.gpio_50 */
poweroff_gpio: pinmux_poweroff_pins {
poweroff_gpio: poweroff-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
>;
};
/* kpd_row0.gpio_178 */
tmp105_irq: pinmux_tmp105_irq {
tmp105_irq: tmp105-irq-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
usb_gpio_mux_sel1: usb-gpio-mux-sel1-pins {
/* gpio_60 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
>;
};
touchscreen_pins: pinmux_touchscreen_pins {
touchscreen_pins: touchscreen-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
als_proximity_pins: pinmux_als_proximity_pins {
als_proximity_pins: als-proximity-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
usb_mdm6600_pins: usb-mdm6600-pins {
pinctrl-single,pins = <
/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
@ -476,7 +476,7 @@
>;
};
usb_ulpi_pins: pinmux_usb_ulpi_pins {
usb_ulpi_pins: usb-ulpi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
@ -496,7 +496,7 @@
};
/* usb0_otg_dp and usb0_otg_dm */
usb_utmi_pins: pinmux_usb_utmi_pins {
usb_utmi_pins: usb-utmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
@ -521,7 +521,7 @@
* when not used. If needed, we can add rts pin remux later based
* on power measurements.
*/
uart1_pins: pinmux_uart1_pins {
uart1_pins: uart1-pins {
pinctrl-single,pins = <
/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
@ -538,7 +538,7 @@
};
/* uart3_tx_irtx and uart3_rx_irrx */
uart3_pins: pinmux_uart3_pins {
uart3_pins: uart3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
@ -557,7 +557,7 @@
>;
};
uart4_pins: pinmux_uart4_pins {
uart4_pins: uart4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
@ -566,7 +566,7 @@
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
mcbsp2_pins: mcbsp2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
@ -575,7 +575,7 @@
>;
};
mcbsp3_pins: pinmux_mcbsp3_pins {
mcbsp3_pins: mcbsp3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
@ -584,13 +584,13 @@
>;
};
vibrator_direction_pin: pinmux_vibrator_direction_pin {
vibrator_direction_pin: vibrator-direction-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1) /* dmtimer8_pwm_evt (gpio_27) */
>;
};
vibrator_enable_pin: pinmux_vibrator_enable_pin {
vibrator_enable_pin: vibrator-enable-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
>;
@ -598,7 +598,7 @@
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
usb_gpio_mux_sel2: usb-gpio-mux-sel2-pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
@ -614,12 +614,12 @@
/* Configure pwm clock source for timers 8 & 9 */
&timer8 {
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
&timer9 {
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
/*

6
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
View file

@ -8,9 +8,9 @@
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {

6
arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
View file

@ -12,9 +12,9 @@
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {

12
arch/arm/boot/dts/omap3-cm-t3517.dts
View file

@ -11,12 +11,12 @@
model = "CompuLab CM-T3517";
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wl12xx_vmmc2: wl12xx_vmmc2 {
compatible = "regulator-fixed";

3
arch/arm/boot/dts/omap3-cpu-thermal.dtsi
View file

@ -12,8 +12,7 @@ cpu_thermal: cpu-thermal {
polling-delay = <1000>; /* milliseconds */
coefficients = <0 20000>;
/* sensor ID */
thermal-sensors = <&bandgap 0>;
thermal-sensors = <&bandgap>;
cpu_trips: trips {
cpu_alert0: cpu_alert {

8
arch/arm/boot/dts/omap3-gta04.dtsi
View file

@ -147,7 +147,7 @@
pinctrl-0 = <&backlight_pins>;
};
pwm11: dmtimer-pwm {
pwm11: pwm-11 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer11>;
#pwm-cells = <3>;
@ -332,7 +332,7 @@
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
>;
};
};
gps_pins: pinmux_gps_pins {
pinctrl-single,pins = <
@ -869,8 +869,8 @@
};
&hdqw1w {
pinctrl-names = "default";
pinctrl-0 = <&hdq_pins>;
pinctrl-names = "default";
pinctrl-0 = <&hdq_pins>;
};
/* image signal processor within OMAP3 SoC */

2
arch/arm/boot/dts/omap3-ldp.dts
View file

@ -301,5 +301,5 @@
&vaux1 {
/* Needed for ads7846 */
regulator-name = "vcc";
regulator-name = "vcc";
};

40
arch/arm/boot/dts/omap3-n900.dts
View file

@ -156,7 +156,7 @@
io-channel-names = "temp", "bsi", "vbat";
};
pwm9: dmtimer-pwm {
pwm9: pwm-9 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer9>;
@ -236,27 +236,27 @@
pinctrl-single,pins = <
/* address lines */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
/* data lines, gpmc_d0..d7 not muxable according to TRM */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
/*
* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
* according to TRM. OneNAND seems to require PIN_INPUT on clock.
*/
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
};
i2c1_pins: pinmux_i2c1_pins {
@ -738,12 +738,12 @@
si4713: si4713@63 {
compatible = "silabs,si4713";
reg = <0x63>;
reg = <0x63>;
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
vio-supply = <&vio>;
vdd-supply = <&vaux1>;
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
vio-supply = <&vio>;
vdd-supply = <&vaux1>;
};
bq24150a: bq24150a@6b {

44
arch/arm/boot/dts/omap3-zoom3.dts
View file

@ -23,9 +23,9 @@
};
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {
@ -84,28 +84,28 @@
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
@ -205,22 +205,22 @@
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&uart4 {
status = "disabled";
status = "disabled";
};
&usb_otg_hs {

29
arch/arm/boot/dts/omap4-cpu-thermal.dtsi
View file

@ -12,21 +12,24 @@ cpu_thermal: cpu_thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
/* sensor ID */
thermal-sensors = <&bandgap 0>;
/*
* See 44xx files for single sensor addressing, omap5 and dra7 need
* also sensor ID for addressing.
*/
thermal-sensors = <&bandgap 0>;
cpu_trips: trips {
cpu_alert0: cpu_alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_alert0: cpu_alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_cooling_maps: cooling-maps {
map0 {

12
arch/arm/boot/dts/omap4-duovero-parlor.dts
View file

@ -62,33 +62,33 @@
&smsc_pins
>;
led_pins: pinmux_led_pins {
led_pins: led-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
>;
};
button_pins: pinmux_button_pins {
button_pins: button-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* abe_dmic_din2.gpio_121 */
>;
};
i2c2_pins: pinmux_i2c2_pins {
i2c2_pins: i2c2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
>;
};
i2c3_pins: pinmux_i2c3_pins {
i2c3_pins: i2c3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
>;
};
smsc_pins: pinmux_smsc_pins {
smsc_pins: smsc-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x068, PIN_INPUT | MUX_MODE3) /* gpmc_a20.gpio_44: IRQ */
OMAP4_IOPAD(0x06a, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a21.gpio_45: nReset */
@ -96,7 +96,7 @@
>;
};
dss_hdmi_pins: pinmux_dss_hdmi_pins {
dss_hdmi_pins: dss-hdmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3) /* hdmi_hpd.gpio_63 */
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */

18
arch/arm/boot/dts/omap4-duovero.dtsi
View file

@ -73,14 +73,14 @@
&hsusbb1_pins
>;
twl6040_pins: pinmux_twl6040_pins {
twl6040_pins: twl6040-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_nxt.gpio_160 */
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
>;
};
mcbsp1_pins: pinmux_mcbsp1_pins {
mcbsp1_pins: mcbsp1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
@ -89,7 +89,7 @@
>;
};
hsusbb1_pins: pinmux_hsusbb1_pins {
hsusbb1_pins: hsusbb1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
@ -106,34 +106,34 @@
>;
};
hsusb1phy_pins: pinmux_hsusb1phy_pins {
hsusb1phy_pins: hsusb1phy-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x08c, PIN_OUTPUT | MUX_MODE3) /* gpmc_wait1.gpio_62 */
>;
};
w2cbw0015_pins: pinmux_w2cbw0015_pins {
w2cbw0015_pins: w2cbw0015-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
>;
};
i2c1_pins: pinmux_i2c1_pins {
i2c1_pins: i2c1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
>;
};
i2c4_pins: pinmux_i2c4_pins {
i2c4_pins: i2c4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
>;
};
mmc1_pins: pinmux_mmc1_pins {
mmc1_pins: mmc1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
OMAP4_IOPAD(0x0e4, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc1_cmd */
@ -144,7 +144,7 @@
>;
};
mmc5_pins: pinmux_mmc5_pins {
mmc5_pins: mmc5-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk */
OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc5_cmd */

14
arch/arm/boot/dts/omap4-kc1.dts
View file

@ -35,42 +35,42 @@
&omap4_pmx_core {
pinctrl-names = "default";
uart3_pins: pinmux_uart3_pins {
uart3_pins: uart3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */
OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx */
>;
};
i2c1_pins: pinmux_i2c1_pins {
i2c1_pins: i2c1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
>;
};
i2c2_pins: pinmux_i2c2_pins {
i2c2_pins: i2c2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
>;
};
i2c3_pins: pinmux_i2c3_pins {
i2c3_pins: i2c3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
>;
};
i2c4_pins: pinmux_i2c4_pins {
i2c4_pins: i2c4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
>;
};
mmc2_pins: pinmux_mmc2_pins {
mmc2_pins: mmc2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat0 */
OMAP4_IOPAD(0x042, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat1 */
@ -85,7 +85,7 @@
>;
};
usb_otg_hs_pins: pinmux_usb_otg_hs_pins {
usb_otg_hs_pins: usb-otg-hs-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x194, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usba0_otg_ce */
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0) /* usba0_otg_dp */

2
arch/arm/boot/dts/omap4-mcpdm.dtsi
View file

@ -7,7 +7,7 @@
*/
&omap4_pmx_core {
mcpdm_pins: pinmux_mcpdm_pins {
mcpdm_pins: mcpdm-pins {
pinctrl-single,pins = <
/* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */
OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)

30
arch/arm/boot/dts/omap4-panda-common.dtsi
View file

@ -237,14 +237,14 @@
&hsusbb1_pins
>;
twl6040_pins: pinmux_twl6040_pins {
twl6040_pins: twl6040-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
>;
};
mcbsp1_pins: pinmux_mcbsp1_pins {
mcbsp1_pins: mcbsp1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
@ -253,7 +253,7 @@
>;
};
dss_dpi_pins: pinmux_dss_dpi_pins {
dss_dpi_pins: dss-dpi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */
OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */
@ -288,13 +288,13 @@
>;
};
tfp410_pins: pinmux_tfp410_pins {
tfp410_pins: tfp410-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3) /* gpio_0 */
>;
};
dss_hdmi_pins: pinmux_dss_hdmi_pins {
dss_hdmi_pins: dss-hdmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
@ -302,7 +302,7 @@
>;
};
tpd12s015_pins: pinmux_tpd12s015_pins {
tpd12s015_pins: tpd12s015-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
@ -310,7 +310,7 @@
>;
};
hsusbb1_pins: pinmux_hsusbb1_pins {
hsusbb1_pins: hsusbb1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
@ -327,28 +327,28 @@
>;
};
i2c1_pins: pinmux_i2c1_pins {
i2c1_pins: i2c1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
>;
};
i2c2_pins: pinmux_i2c2_pins {
i2c2_pins: i2c2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
>;
};
i2c3_pins: pinmux_i2c3_pins {
i2c3_pins: i2c3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
>;
};
i2c4_pins: pinmux_i2c4_pins {
i2c4_pins: i2c4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
@ -359,7 +359,7 @@
* wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
* REVISIT: Are the pull-ups needed for GPIO 48 and 49?
*/
wl12xx_gpio: pinmux_wl12xx_gpio {
wl12xx_gpio: wl12xx-gpio-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
@ -369,7 +369,7 @@
};
/* wl12xx GPIO inputs and SDIO pins */
wl12xx_pins: pinmux_wl12xx_pins {
wl12xx_pins: wl12xx-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
@ -382,7 +382,7 @@
>;
};
button_pins: pinmux_button_pins {
button_pins: button-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_121 */
>;
@ -390,7 +390,7 @@
};
&omap4_pmx_wkup {
led_wkgpio_pins: pinmux_leds_wkpins {
led_wkgpio_pins: leds-wkpins-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */

8
arch/arm/boot/dts/omap4-panda-es.dts
View file

@ -38,26 +38,26 @@
};
&omap4_pmx_core {
led_gpio_pins: gpio_led_pmx {
led_gpio_pins: gpio-led-pmx-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
>;
};
button_pins: pinmux_button_pins {
button_pins: button-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0fc, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */
>;
};
bt_pins: pinmux_bt_pins {
bt_pins: bt-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 - BTEN */
OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 - BTWAKEUP */
>;
};
uart2_pins: pinmux_uart2_pins {
uart2_pins: uart2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts - HCI */
OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */

36
arch/arm/boot/dts/omap4-sdp.dts
View file

@ -214,7 +214,7 @@
&tpd12s015_pins
>;
uart2_pins: pinmux_uart2_pins {
uart2_pins: uart2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
@ -223,7 +223,7 @@
>;
};
uart3_pins: pinmux_uart3_pins {
uart3_pins: uart3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
@ -232,21 +232,21 @@
>;
};
uart4_pins: pinmux_uart4_pins {
uart4_pins: uart4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
>;
};
twl6040_pins: pinmux_twl6040_pins {
twl6040_pins: twl6040-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
>;
};
dmic_pins: pinmux_dmic_pins {
dmic_pins: dmic-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
@ -255,7 +255,7 @@
>;
};
mcbsp1_pins: pinmux_mcbsp1_pins {
mcbsp1_pins: mcbsp1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
@ -264,7 +264,7 @@
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
mcbsp2_pins: mcbsp2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
@ -273,7 +273,7 @@
>;
};
mcspi1_pins: pinmux_mcspi1_pins {
mcspi1_pins: mcspi1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
@ -282,7 +282,7 @@
>;
};
dss_hdmi_pins: pinmux_dss_hdmi_pins {
dss_hdmi_pins: dss-hdmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
@ -290,7 +290,7 @@
>;
};
tpd12s015_pins: pinmux_tpd12s015_pins {
tpd12s015_pins: tpd12s015-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
@ -298,28 +298,28 @@
>;
};
i2c1_pins: pinmux_i2c1_pins {
i2c1_pins: i2c1-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
>;
};
i2c2_pins: pinmux_i2c2_pins {
i2c2_pins: i2c2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
>;
};
i2c3_pins: pinmux_i2c3_pins {
i2c3_pins: i2c3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
>;
};
i2c4_pins: pinmux_i2c4_pins {
i2c4_pins: i2c4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
@ -327,14 +327,14 @@
};
/* wl12xx GPIO output for WLAN_EN */
wl12xx_gpio: pinmux_wl12xx_gpio {
wl12xx_gpio: wl12xx-gpio-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
>;
};
/* wl12xx GPIO inputs and SDIO pins */
wl12xx_pins: pinmux_wl12xx_pins {
wl12xx_pins: wl12xx-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
@ -347,13 +347,13 @@
};
/* gpio_48 for ENET_ENABLE */
enet_enable_gpio: pinmux_enet_enable_gpio {
enet_enable_gpio: enet-enable-gpio-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a24.gpio_48 */
>;
};
ks8851_pins: pinmux_ks8851_pins {
ks8851_pins: ks8851-pins {
pinctrl-single,pins = <
/* ENET_INT */
OMAP4_IOPAD(0x054, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.gpio_34 */

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