From e8ac95d4bc055996a47e9a45b41dde46790e3987 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 8 Sep 2023 12:16:02 +0000 Subject: [PATCH] Revert "arm64: errata: Mitigate Ampere1 erratum AC03_CPU_38 at stage-2" This reverts commit cde7f2fd6323e5054e1db2f1ee7231864cd5294c which is commit 6df696cd9bc1ceed0e92e36908f88bbd16d18255 upstream. It breaks the Android abi and isn't really needed for Android systems. If it is needed in the future, it can come back in an ABI-safe way. Bug: 161946584 Change-Id: I5134a2ccd9bd11cb7fbf3e5c6d8a0f2b8ee924d3 Signed-off-by: Greg Kroah-Hartman --- Documentation/arm64/silicon-errata.rst | 3 --- arch/arm64/Kconfig | 19 ------------------- arch/arm64/kernel/cpu_errata.c | 7 ------- arch/arm64/kvm/hyp/pgtable.c | 14 +++----------- arch/arm64/tools/cpucaps | 1 - 5 files changed, 3 insertions(+), 41 deletions(-) diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index e078edef0c4f..3283f49006d6 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -52,9 +52,6 @@ stable kernels. | Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 | +----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ -| Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | -+----------------+-----------------+-----------------+-----------------------------+ -+----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 | diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 94a940ecbdbb..7dafeacab872 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -384,25 +384,6 @@ menu "Kernel Features" menu "ARM errata workarounds via the alternatives framework" -config AMPERE_ERRATUM_AC03_CPU_38 - bool "AmpereOne: AC03_CPU_38: Certain bits in the Virtualization Translation Control Register and Translation Control Registers do not follow RES0 semantics" - default y - help - This option adds an alternative code sequence to work around Ampere - erratum AC03_CPU_38 on AmpereOne. - - The affected design reports FEAT_HAFDBS as not implemented in - ID_AA64MMFR1_EL1.HAFDBS, but (V)TCR_ELx.{HA,HD} are not RES0 - as required by the architecture. The unadvertised HAFDBS - implementation suffers from an additional erratum where hardware - A/D updates can occur after a PTE has been marked invalid. - - The workaround forces KVM to explicitly set VTCR_EL2.HA to 0, - which avoids enabling unadvertised hardware Access Flag management - at stage-2. - - If unsure, say Y. - config ARM64_WORKAROUND_CLEAN_CACHE bool diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 8dbf3c21ea22..89ac00084f38 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -722,13 +722,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = { MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)), .cpu_enable = cpu_clear_bf16_from_user_emulation, }, -#endif -#ifdef CONFIG_AMPERE_ERRATUM_AC03_CPU_38 - { - .desc = "AmpereOne erratum AC03_CPU_38", - .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, - ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), - }, #endif { } diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c index 9e32002da41c..b7e8faa894c9 100644 --- a/arch/arm64/kvm/hyp/pgtable.c +++ b/arch/arm64/kvm/hyp/pgtable.c @@ -543,18 +543,10 @@ u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift) #ifdef CONFIG_ARM64_HW_AFDBM /* * Enable the Hardware Access Flag management, unconditionally - * on all CPUs. In systems that have asymmetric support for the feature - * this allows KVM to leverage hardware support on the subset of cores - * that implement the feature. - * - * The architecture requires VTCR_EL2.HA to be RES0 (thus ignored by - * hardware) on implementations that do not advertise support for the - * feature. As such, setting HA unconditionally is safe, unless you - * happen to be running on a design that has unadvertised support for - * HAFDBS. Here be dragons. + * on all CPUs. The features is RES0 on CPUs without the support + * and must be ignored by the CPUs. */ - if (!cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38)) - vtcr |= VTCR_EL2_HA; + vtcr |= VTCR_EL2_HA; #endif /* CONFIG_ARM64_HW_AFDBM */ /* Set the vmid bits */ diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index cfc4a80e49e0..7b79a8b09504 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -71,7 +71,6 @@ WORKAROUND_2064142 WORKAROUND_2077057 WORKAROUND_2457168 WORKAROUND_2658417 -WORKAROUND_AMPERE_AC03_CPU_38 WORKAROUND_TRBE_OVERWRITE_FILL_MODE WORKAROUND_TSB_FLUSH_FAILURE WORKAROUND_TRBE_WRITE_OUT_OF_RANGE