V_01-00-42
1. Reset assert and clock disable support during Link Down.
This commit is contained in:
TC956X
jianzhou
parent
4d94d05dd1
commit
ffcc08ecdb
5 changed files with 162 additions and 9 deletions
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@ -1,7 +1,7 @@
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# Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
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Release Date: 04 Feb 2022
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Release Date: 14 Feb 2022
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Release Version: V_01-00-41 : Limited-tested version
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Release Version: V_01-00-42 : Limited-tested version
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TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
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@ -459,3 +459,7 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
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1. DMA channel status cleared only for SW path allocated DMA channels. IPA path DMA channel status clearing is skipped.
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2. Ethtool statistics added to print doorbell SRAM area for all the channels.
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## TC956X_Host_Driver_20220214_V_01-00-42:
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1. Reset assert and clock disable support during Link Down.
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23
common.h
23
common.h
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@ -76,7 +76,9 @@
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* 31 Jan 2022 : 1. Additional macros defined for debug dump API usage.
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* VERSION : 01-00-39
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* 04 Feb 2021 : 1. Ethtool statistics added to print doorbell SRAM area for all the channels.
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* VERSION : 01-00-41
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* VERSION : 01-00-41
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* 14 Feb 2021 : 1. Reset assert and clock disable support during Link Down.
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* VERSION : 01-00-42
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*/
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#ifndef __COMMON_H__
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@ -108,12 +110,19 @@
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#define TC956X_MAX_PORT 2
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#define TC956X_ALL_MAC_PORT_SUSPENDED 0 /* All EMAC Port Suspended. To be used just after suspend and before resume. */
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#define TC956X_NO_MAC_DEVICE_IN_USE 0 /* No EMAC Port in use. To be used at probe and remove. */
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#define TC956X_ALL_MAC_PORT_LINK_DOWN 2 /* All ports are Link Down */
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/* Suspend-Resume Arguments */
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enum TC956X_PORT_PM_STATE {
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SUSPEND = 0,
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RESUME,
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};
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/* Link Down Change Power State Arguments */
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enum TC956X_PORT_LINK_CHANGE_STATE {
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LINK_DOWN = 0,
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LINK_UP,
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};
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//#define TC956X_PCIE_LINK_STATE_LATENCY_CTRL
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#define DISABLE 0
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@ -730,6 +739,16 @@ enum packets_types {
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#define NCLKCTRL0_DEFAULT (NCLKCTRL0_SRMCEM | NCLKCTRL0_I2SSPIEN | \
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NCLKCTRL0_PCIECEN | NCLKCTRL0_MCUCEN)
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#define NBUSCTRL_OFFSET (0x1014)
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#define NRSTCTRL_LINK_DOWN (NRSTCTRL0_MAC0PMARST | NRSTCTRL0_MAC0PONRST)
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#define NCLKCTRL_LINK_DOWN (NCLKCTRL0_MAC0TXCEN | NCLKCTRL0_MAC0RXCEN | \
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NCLKCTRL0_MAC0125CLKEN | NCLKCTRL0_MAC0312CLKEN | \
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NCLKCTRL1_MAC1RMCEN)
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#define NRSTCTRL_LINK_DOWN_SAVE (0xC0000080U) /* Save Non-Common Reset Register Bits Between Port 0 and Port 1 */
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#define NCLKCTRL_LINK_DOWN_SAVE (0xE000C080U) /* Save Non-Common Clock Register Bits Between Port 0 and Port 1 */
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#define NRSTCTRL_LINK_DOWN_CMN_SAVE (0x00051213U) /* Save Common Reset Register Bits Between Port 0 and Port 1 */
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#define NCLKCTRL_LINK_DOWN_CMN_SAVE (0x07053211U) /* Save Common Clock Register Bits Between Port 0 and Port 1 */
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#endif
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#define NSPLLPARAM_OFFSET (0x1020) /* TC956X System PLL parameters */
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@ -140,6 +140,8 @@
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* VERSION : 01-00-40
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* 04 Feb 2022 : 1. Version update
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* VERSION : 01-00-41
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* 14 Feb 2022 : 1. Version update
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* VERSION : 01-00-42
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*/
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#include <linux/clk-provider.h>
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@ -204,7 +206,7 @@ static unsigned int mac1_txq1_size = TX_QUEUE1_SIZE;
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unsigned int mac0_en_lp_pause_frame_cnt = DISABLE;
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unsigned int mac1_en_lp_pause_frame_cnt = DISABLE;
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static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 4, 1};
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static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 4, 2};
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static int tc956xmac_pm_usage_counter; /* Device Usage Counter */
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struct mutex tc956x_pm_suspend_lock; /* This mutex is shared between all available EMAC ports. */
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@ -129,6 +129,9 @@
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* VERSION : 01-00-40
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* 04 Feb 2022 : 1. Version update
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* VERSION : 01-00-41
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* 14 Feb 2022 : 1. Reset assert and clock disable support during Link Down.
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* 2. Version update.
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* VERSION : 01-00-42
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*/
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#ifndef __TC956XMAC_H__
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@ -184,7 +187,7 @@
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#define IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0") : ("eth1"))
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#define WOL_IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0_wol") : ("eth1_wol"))
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#define DRV_MODULE_VERSION "V_01-00-41"
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#define DRV_MODULE_VERSION "V_01-00-42"
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#define TC956X_FW_MAX_SIZE (64*1024)
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#define ATR_AXI4_SLV_BASE 0x0800
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@ -662,7 +665,9 @@ struct tc956xmac_priv {
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struct work_struct emac_phy_work;
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u32 pm_saved_emac_rst; /* Save and restore EMAC Resets during suspend-resume sequence */
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u32 pm_saved_emac_clk; /* Save and restore EMAC Clocks during suspend-resume sequence */
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u32 pm_saved_linkdown_rst; /* Save and restore Resets during link-down sequence */
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u32 pm_saved_linkdown_clk; /* Save and restore Clocks during link-down sequence */
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bool port_link_down; /* Flag to save per port link down state */
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};
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struct tc956x_version {
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127
tc956xmac_main.c
127
tc956xmac_main.c
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@ -105,6 +105,8 @@
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* VERSION : 01-00-39
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* 04 Feb 2022 : 1. DMA channel status cleared only for SW path allocated DMA channels. IPA path DMA channel status clearing is skipped.
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* VERSION : 01-00-41
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* 14 Feb 2022 : 1. Reset assert and clock disable support during Link Down.
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* VERSION : 01-00-42
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*/
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#include <linux/clk.h>
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@ -218,6 +220,9 @@ static void tc956xmac_init_fs(struct net_device *dev);
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static void tc956xmac_exit_fs(struct net_device *dev);
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#endif
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static u32 tc956xmac_link_down_counter = 0; /* Counter to count Link Down/Up for both port */
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static void tc956xmac_link_change_set_power(struct tc956xmac_priv *priv, enum TC956X_PORT_LINK_CHANGE_STATE state);
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#define TC956XMAC_COAL_TIMER(x) (jiffies + usecs_to_jiffies(x))
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/* MAC address */
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@ -2383,6 +2388,9 @@ static void tc956xmac_mac_link_down(struct phylink_config *config,
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#ifdef TC956X_PM_DEBUG
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pm_generic_suspend(priv->device);
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#endif
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tc956xmac_link_down_counter++; /* Increment counter only when Link Down */
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tc956xmac_link_change_set_power(priv, LINK_DOWN); /* Save, Assert and Disable Reset and Clock */
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priv->port_link_down = true; /* Set per port flag to true */
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}
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#ifdef TC956X_5_G_2_5_G_EEE_SUPPORT
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@ -2593,6 +2601,9 @@ static void tc956xmac_mac_link_up(struct phylink_config *config,
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{
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struct tc956xmac_priv *priv = netdev_priv(to_net_dev(config->dev));
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if (priv->port_link_down == true)
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tc956xmac_link_change_set_power(priv, LINK_UP); /* Restore, De-assert and Enable Reset and Clock */
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tc956xmac_mac_set_rx(priv, priv->ioaddr, true);
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#ifdef EEE
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if (phy && priv->dma_cap.eee && priv->eee_enabled) {
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@ -4811,7 +4822,11 @@ static int tc956xmac_open(struct net_device *dev)
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KPRINT_INFO("---> %s : Port %d", __func__, priv->port_num);
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phydev = mdiobus_get_phy(priv->mii, addr);
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if (priv->port_link_down == true) {
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tc956xmac_link_change_set_power(priv, LINK_UP); /* Restore, De-assert and Enable Reset and Clock */
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}
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if (!phydev) {
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netdev_err(priv->dev, "no phy at addr %d\n", addr);
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return -ENODEV;
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@ -6587,6 +6602,10 @@ static irqreturn_t tc956xmac_interrupt(int irq, void *dev_id)
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val = readl(priv->ioaddr + TC956X_MSI_INT_STS_OFFSET(priv->port_num));
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if (val & TC956X_EXT_PHY_ETH_INT) {
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KPRINT_INFO("PHY Interrupt %s \n", __func__);
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if (priv->port_link_down == true)
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tc956xmac_link_change_set_power(priv, LINK_UP); /* Restore, De-assert and Enable Reset and Clock */
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/* Queue the work in system_wq */
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if (priv->tc956x_port_pm_suspend == true) {
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KPRINT_INFO("%s : (Do not queue PHY Work during suspend. Set WOL Interrupt flag) \n", __func__);
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@ -10956,7 +10975,9 @@ int tc956xmac_dvr_probe(struct device *device,
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priv->port_interface = res->port_interface;
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priv->eee_enabled = res->eee_enabled;
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priv->tx_lpi_timer = res->tx_lpi_timer;
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priv->pm_saved_linkdown_rst = 0;
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priv->pm_saved_linkdown_clk = 0;
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priv->port_link_down = false;
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#ifdef DMA_OFFLOAD_ENABLE
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priv->client_priv = NULL;
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memset(priv->cm3_tamap, 0, sizeof(struct tc956xmac_cm3_tamap) * MAX_CM3_TAMAP_ENTRIES);
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@ -11611,6 +11632,108 @@ clean_exit:
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}
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EXPORT_SYMBOL_GPL(tc956xmac_resume);
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/*!
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* \brief API to save and restore clock and reset during link down and link up.
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*
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* \details This fucntion saves the EMAC clock and reset bits before
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* link down. And restores the same settings after link up.
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*
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* \param[in] priv - pointer to device private structure.
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* \param[in] state - identify LINK DOWN and LINK DOWN operation.
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*
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* \return None
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*/
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static void tc956xmac_link_change_set_power(struct tc956xmac_priv *priv, enum TC956X_PORT_LINK_CHANGE_STATE state)
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{
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void *nrst_reg = NULL, *nclk_reg = NULL, *commonrst_reg = NULL, *commonclk_reg = NULL;
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u32 nrst_val = 0, nclk_val = 0, commonrst_val = 0, commonclk_val = 0;
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static u32 pm_saved_cmn_linkdown_rst = 0, pm_saved_cmn_linkdown_clk = 0;
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KPRINT_INFO("-->%s : Port %d", __func__, priv->port_num);
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/* Select register address by port */
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if (priv->port_num == 0) {
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nrst_reg = priv->tc956x_SFR_pci_base_addr + NRSTCTRL0_OFFSET;
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nclk_reg = priv->tc956x_SFR_pci_base_addr + NCLKCTRL0_OFFSET;
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} else {
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nrst_reg = priv->tc956x_SFR_pci_base_addr + NRSTCTRL1_OFFSET;
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nclk_reg = priv->tc956x_SFR_pci_base_addr + NCLKCTRL1_OFFSET;
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}
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if (state == LINK_DOWN) {
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KPRINT_INFO("%s : Port %d Set Power for Link Down", __func__, priv->port_num);
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nrst_val = readl(nrst_reg);
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nclk_val = readl(nclk_reg);
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KPRINT_INFO("%s : Port %d Rd RST Reg:%x, CLK Reg:%x", __func__, priv->port_num,
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nrst_val, nclk_val);
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/* Save register values before Asserting reset and Clock Disable */
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priv->pm_saved_linkdown_rst = ((~nrst_val) & NRSTCTRL_LINK_DOWN_SAVE); /* Save Non-Common De-Asserted Resets */
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priv->pm_saved_linkdown_clk = (nclk_val & NCLKCTRL_LINK_DOWN_SAVE); /* Save Non-Common Enabled Clocks */
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KPRINT_INFO("%s : Port %d priv->pm_saved_linkdown_rst %x priv->pm_saved_linkdown_clk %x", __func__,
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priv->port_num, priv->pm_saved_linkdown_rst, priv->pm_saved_linkdown_clk);
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/* Assert Reset and Disable Clock */
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nrst_val = nrst_val | NRSTCTRL_LINK_DOWN;
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nclk_val = nclk_val & ~NCLKCTRL_LINK_DOWN;
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KPRINT_INFO("%s : Port %d Wr RST Reg:%x, CLK Reg:%x", __func__, priv->port_num,
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nrst_val, nclk_val);
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writel(nrst_val, nrst_reg);
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writel(nclk_val, nclk_reg);
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if (tc956xmac_link_down_counter == TC956X_ALL_MAC_PORT_LINK_DOWN) {
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/* Save Common register values */
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commonrst_reg = priv->tc956x_SFR_pci_base_addr + NRSTCTRL0_OFFSET;
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commonclk_reg = priv->tc956x_SFR_pci_base_addr + NCLKCTRL0_OFFSET;
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commonrst_val = readl(commonrst_reg);
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commonclk_val = readl(commonclk_reg);
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KPRINT_INFO("%s : Port %d Common Rd RST Reg:%x, CLK Reg:%x", __func__, priv->port_num,
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commonrst_val, commonclk_val);
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pm_saved_cmn_linkdown_rst = ((~commonrst_val) & NRSTCTRL_LINK_DOWN_CMN_SAVE); /* Save Common De-Asserted Resets */
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pm_saved_cmn_linkdown_clk = commonclk_val & NCLKCTRL_LINK_DOWN_CMN_SAVE; /* Save Common Enabled Clocks */
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KPRINT_INFO("%s : Port %d pm_saved_cmn_linkdown_rst %x pm_saved_cmn_linkdown_clk %x", __func__,
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priv->port_num, pm_saved_cmn_linkdown_rst, pm_saved_cmn_linkdown_clk);
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}
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} else if (state == LINK_UP) {
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KPRINT_INFO("%s : Port %d Set Power for Link Up", __func__, priv->port_num);
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if (tc956xmac_link_down_counter == TC956X_ALL_MAC_PORT_LINK_DOWN) {
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/* Restore Common register values */
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KPRINT_INFO("%s : Port %d pm_saved_cmn_linkdown_clk %x, pm_saved_cmn_linkdown_rst %x", __func__,
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priv->port_num, pm_saved_cmn_linkdown_clk, pm_saved_cmn_linkdown_rst);
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/* Enable Common Clock and De-Assert Common Resets */
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commonclk_reg = priv->tc956x_SFR_pci_base_addr + NCLKCTRL0_OFFSET;
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commonrst_reg = priv->tc956x_SFR_pci_base_addr + NRSTCTRL0_OFFSET;
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commonclk_val = readl(commonclk_reg);
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commonrst_val = readl(commonrst_reg);
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KPRINT_INFO("%s : Port %d Common Rd CLK Reg:%x, RST Reg:%x ", __func__, priv->port_num,
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commonclk_val, commonrst_val);
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/* Clear Common Clocks only when both port suspends */
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commonclk_val = (commonclk_val | pm_saved_cmn_linkdown_clk); /* Enable Common Saved Clock */
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commonrst_val = (commonrst_val & (~pm_saved_cmn_linkdown_rst)); /* De-assert Common Saved Reset */
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writel(commonclk_val, commonclk_reg);
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writel(commonrst_val, commonrst_reg);
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KPRINT_INFO("%s : Port %d Common Wr CLK Reg:%x, RST Reg:%x ", __func__, priv->port_num,
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commonclk_val, commonrst_val);
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KPRINT_INFO("%s : Port %d Common Rd CLK Reg:%x, RST Reg:%x", __func__, priv->port_num,
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readl(commonclk_reg), readl(commonrst_reg));
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}
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/* Restore register values */
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KPRINT_INFO("%s : Port %d pm_saved_linkdown_clk %x, pm_saved_linkdown_rst %x", __func__,
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priv->port_num, priv->pm_saved_linkdown_clk, priv->pm_saved_linkdown_rst);
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nclk_val = readl(nclk_reg);
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nrst_val = readl(nrst_reg);
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KPRINT_INFO("%s : Port %d Rd CLK Reg:%x, RST Reg:%x", __func__, priv->port_num,
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nrst_val, nclk_val);
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/* Restore values same as before link down */
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nclk_val = (nclk_val | priv->pm_saved_linkdown_clk); /* Enable Saved Clock */
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nrst_val = (nrst_val & (~(priv->pm_saved_linkdown_rst))); /* De-assert Saved Reset */
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writel(nclk_val, nclk_reg);
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writel(nrst_val, nrst_reg);
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KPRINT_INFO("%s : Port %d Wr CLK Reg:%x, RST Reg:%x ", __func__, priv->port_num,
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nclk_val, nrst_val);
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tc956xmac_link_down_counter--; /* Decrement Counter Only when this api called */
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priv->port_link_down = false;
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}
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KPRINT_INFO("%s : Port %d Rd RST Reg:%x, CLK Reg:%x", __func__, priv->port_num,
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readl(nrst_reg), readl(nclk_reg));
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KPRINT_INFO("<--%s : Port %d", __func__, priv->port_num);
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}
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#ifndef MODULE
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static int __init tc956xmac_cmdline_opt(char *str)
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{
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