Ville Syrjälä a4565da8ae drm/i915/chv: Initial clock gating support for Cherryview ... CHV clock gating isn't identical to VLV, so add a new function for it. This is only a start, and further changes are needed as the details become available. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-05-12 19:50:00 +02:00
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drm	drm/i915/chv: Initial clock gating support for Cherryview	2014-05-12 19:50:00 +02:00
host1x	gpu: host1x: handle the correct # of syncpt regs	2014-04-16 17:11:04 +02:00
vga	vgaarb: Fix VGA decodes changes	2013-09-03 19:17:59 +02:00
Makefile