Leo Chen ae1cb9656e drm/amd/display: Exit idle optimizations before attempt to access PHY ... [ Upstream commit de612738e9771bd66aeb20044486c457c512f684 ] [Why & How] DMUB may hang when powering down pixel clocks due to no dprefclk. It is fixed by exiting idle optimization before the attempt to access PHY. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Leo Chen <sancchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-09-13 09:42:23 +02:00
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drm	drm/amd/display: Exit idle optimizations before attempt to access PHY	2023-09-13 09:42:23 +02:00
host1x	gpu: host1x: Fix memory leak of device names	2023-05-11 23:03:12 +09:00
ipu-v3	gpu: ipu-v3: common: Add of_node_put() for reference returned by of_graph_get_port_by_id()	2023-03-10 09:33:10 +01:00
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