The M4U IP blocks in mt2712 is MTK's generation2 M4U which use the ARM Short-descriptor like mt8173, and most of the HW registers are the same. The difference is that there are 2 M4U HWs in mt2712 while there's only one in mt8173. The purpose of 2 M4U HWs is for balance the bandwidth. Normally if there are 2 M4U HWs, there should be 2 iommu domains, each M4U has a iommu domain. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> |
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| .. | ||
| samsung | ||
| tegra | ||
| atmel-ebi.c | ||
| atmel-sdramc.c | ||
| da8xx-ddrctl.c | ||
| emif.c | ||
| emif.h | ||
| fsl-corenet-cf.c | ||
| fsl_ifc.c | ||
| jz4780-nemc.c | ||
| Kconfig | ||
| Makefile | ||
| mtk-smi.c | ||
| mvebu-devbus.c | ||
| of_memory.c | ||
| of_memory.h | ||
| omap-gpmc.c | ||
| pl172.c | ||
| tegra20-mc.c | ||
| ti-aemif.c | ||