Paul Hsieh ec5f00a59a drm/amd/display: Correct DML calculation to follow HW SPEC ... [ Upstream commit 385c3e4c29e1d4ce8f68687a8c84621e4c0e0416 ] [Why] In 2560x1600@240p eDP panel, driver use lowest voltage level to play 1080p video cause underflow. According to HW SPEC, the senario should use high voltage level. [How] ChromaPre value is zero when bandwidth validation. Correct ChromaPre calculation. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-05-24 17:32:36 +01:00
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drm	drm/amd/display: Correct DML calculation to follow HW SPEC	2023-05-24 17:32:36 +01:00
host1x	gpu: host1x: Fix memory leak of device names	2023-05-11 23:03:12 +09:00
ipu-v3	gpu: ipu-v3: common: Add of_node_put() for reference returned by of_graph_get_port_by_id()	2023-03-10 09:33:10 +01:00
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vga
Makefile	gpu: host1x: Add context bus	2022-06-01 11:50:42 +02:00